forked from OSchip/llvm-project
182 lines
5.4 KiB
C++
182 lines
5.4 KiB
C++
//===- Target.cpp ---------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Machine-specific things, such as applying relocations, creation of
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// GOT or PLT entries, etc., are handled in this file.
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//
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// Refer the ELF spec for the single letter variables, S, A or P, used
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// in this file.
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//
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// Some functions defined in this file has "relaxTls" as part of their names.
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// They do peephole optimization for TLS variables by rewriting instructions.
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// They are not part of the ABI but optional optimization, so you can skip
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// them if you are not interested in how TLS variables are optimized.
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// See the following paper for the details.
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//
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// Ulrich Drepper, ELF Handling For Thread-Local Storage
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// http://www.akkadia.org/drepper/tls.pdf
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//
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//===----------------------------------------------------------------------===//
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#include "Target.h"
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#include "InputFiles.h"
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#include "OutputSections.h"
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#include "SymbolTable.h"
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#include "Symbols.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Object/ELF.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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const TargetInfo *elf::Target;
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std::string lld::toString(RelType Type) {
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StringRef S = getELFRelocationTypeName(elf::Config->EMachine, Type);
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if (S == "Unknown")
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return ("Unknown (" + Twine(Type) + ")").str();
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return S;
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}
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TargetInfo *elf::getTarget() {
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switch (Config->EMachine) {
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case EM_386:
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case EM_IAMCU:
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return getX86TargetInfo();
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case EM_AARCH64:
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return getAArch64TargetInfo();
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case EM_AMDGPU:
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return getAMDGPUTargetInfo();
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case EM_ARM:
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return getARMTargetInfo();
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case EM_AVR:
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return getAVRTargetInfo();
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case EM_HEXAGON:
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return getHexagonTargetInfo();
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case EM_MIPS:
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switch (Config->EKind) {
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case ELF32LEKind:
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return getMipsTargetInfo<ELF32LE>();
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case ELF32BEKind:
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return getMipsTargetInfo<ELF32BE>();
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case ELF64LEKind:
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return getMipsTargetInfo<ELF64LE>();
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case ELF64BEKind:
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return getMipsTargetInfo<ELF64BE>();
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default:
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llvm_unreachable("unsupported MIPS target");
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}
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case EM_MSP430:
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return getMSP430TargetInfo();
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case EM_PPC:
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return getPPCTargetInfo();
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case EM_PPC64:
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return getPPC64TargetInfo();
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case EM_RISCV:
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return getRISCVTargetInfo();
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case EM_SPARCV9:
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return getSPARCV9TargetInfo();
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case EM_X86_64:
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return getX86_64TargetInfo();
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}
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llvm_unreachable("unknown target machine");
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}
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template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) {
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for (InputSectionBase *D : InputSections) {
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auto *IS = cast<InputSection>(D);
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if (!IS->getParent())
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continue;
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uint8_t *ISLoc = Out::BufferStart + IS->getParent()->Offset + IS->OutSecOff;
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if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
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return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "};
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}
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return {};
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}
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ErrorPlace elf::getErrorPlace(const uint8_t *Loc) {
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switch (Config->EKind) {
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case ELF32LEKind:
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return getErrPlace<ELF32LE>(Loc);
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case ELF32BEKind:
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return getErrPlace<ELF32BE>(Loc);
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case ELF64LEKind:
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return getErrPlace<ELF64LE>(Loc);
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case ELF64BEKind:
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return getErrPlace<ELF64BE>(Loc);
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default:
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llvm_unreachable("unknown ELF type");
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}
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}
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TargetInfo::~TargetInfo() {}
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int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
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return 0;
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}
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bool TargetInfo::usesOnlyLowPageBits(RelType Type) const { return false; }
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bool TargetInfo::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
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uint64_t BranchAddr, const Symbol &S) const {
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return false;
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}
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bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End,
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uint8_t StOther) const {
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llvm_unreachable("Target doesn't support split stacks.");
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}
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bool TargetInfo::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
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return true;
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}
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void TargetInfo::writeIgotPlt(uint8_t *Buf, const Symbol &S) const {
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writeGotPlt(Buf, S);
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}
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RelExpr TargetInfo::adjustRelaxExpr(RelType Type, const uint8_t *Data,
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RelExpr Expr) const {
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return Expr;
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}
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void TargetInfo::relaxGot(uint8_t *Loc, uint64_t Val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, RelType Type,
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uint64_t Val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, RelType Type,
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uint64_t Val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, RelType Type,
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uint64_t Val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
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uint64_t Val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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uint64_t TargetInfo::getImageBase() const {
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// Use -image-base if set. Fall back to the target default if not.
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if (Config->ImageBase)
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return *Config->ImageBase;
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return Config->Pic ? 0 : DefaultImageBase;
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}
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