forked from OSchip/llvm-project
107 lines
3.2 KiB
LLVM
107 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
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; With -tailcallopt, CodeGen guarantees a tail call optimization
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; for all of these.
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declare fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
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define fastcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind {
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; CHECK-LABEL: tailcaller:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: addl $8, %esp
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; CHECK-NEXT: jmp tailcallee # TAILCALL
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entry:
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%tmp11 = tail call fastcc i32 @tailcallee(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
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ret i32 %tmp11
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}
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declare fastcc i8* @alias_callee()
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define fastcc noalias i8* @noalias_caller() nounwind {
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; CHECK-LABEL: noalias_caller:
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; CHECK: # %bb.0:
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; CHECK-NEXT: jmp alias_callee # TAILCALL
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%p = tail call fastcc i8* @alias_callee()
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ret i8* %p
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}
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declare fastcc noalias i8* @noalias_callee()
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define fastcc i8* @alias_caller() nounwind {
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; CHECK-LABEL: alias_caller:
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; CHECK: # %bb.0:
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; CHECK-NEXT: jmp noalias_callee # TAILCALL
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%p = tail call fastcc noalias i8* @noalias_callee()
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ret i8* %p
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}
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declare fastcc i32 @i32_callee()
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define fastcc i32 @ret_undef() nounwind {
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; CHECK-LABEL: ret_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: jmp i32_callee # TAILCALL
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%p = tail call fastcc i32 @i32_callee()
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ret i32 undef
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}
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declare fastcc void @does_not_return()
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define fastcc i32 @noret() nounwind {
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; CHECK-LABEL: noret:
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; CHECK: # %bb.0:
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; CHECK-NEXT: jmp does_not_return # TAILCALL
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tail call fastcc void @does_not_return()
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unreachable
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}
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define fastcc void @void_test(i32, i32, i32, i32) {
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; CHECK-LABEL: void_test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: subl $8, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %esi, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl %esi, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: addl $8, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: jmp void_test # TAILCALL
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entry:
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tail call fastcc void @void_test( i32 %0, i32 %1, i32 %2, i32 %3)
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ret void
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}
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define fastcc i1 @i1test(i32, i32, i32, i32) {
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; CHECK-LABEL: i1test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: subl $8, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %esi, -8
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl %esi, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: addl $8, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: jmp i1test # TAILCALL
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entry:
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%4 = tail call fastcc i1 @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
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ret i1 %4
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}
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