forked from OSchip/llvm-project
93 lines
3.6 KiB
LLVM
93 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
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define <2 x i64> @test_mm_broadcastmb_epi64(<2 x i64> %a, <2 x i64> %b) {
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; X86-LABEL: test_mm_broadcastmb_epi64:
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; X86: # %bb.0: # %entry
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; X86-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
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; X86-NEXT: kmovw %k0, %eax
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; X86-NEXT: vmovd %eax, %xmm0
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; X86-NEXT: vpbroadcastq %xmm0, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mm_broadcastmb_epi64:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
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; X64-NEXT: vpbroadcastmb2q %k0, %xmm0
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; X64-NEXT: retq
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entry:
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%0 = bitcast <2 x i64> %a to <4 x i32>
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%1 = bitcast <2 x i64> %b to <4 x i32>
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%2 = icmp eq <4 x i32> %0, %1
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%3 = shufflevector <4 x i1> %2, <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%4 = bitcast <8 x i1> %3 to i8
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%conv.i = zext i8 %4 to i64
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%vecinit.i.i = insertelement <2 x i64> undef, i64 %conv.i, i32 0
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%vecinit1.i.i = shufflevector <2 x i64> %vecinit.i.i, <2 x i64> undef, <2 x i32> zeroinitializer
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ret <2 x i64> %vecinit1.i.i
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}
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define <4 x i64> @test_mm256_broadcastmb_epi64(<4 x i64> %a, <4 x i64> %b) {
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; X86-LABEL: test_mm256_broadcastmb_epi64:
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; X86: # %bb.0: # %entry
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; X86-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
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; X86-NEXT: kmovw %k0, %eax
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; X86-NEXT: vmovd %eax, %xmm0
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; X86-NEXT: vpbroadcastq %xmm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mm256_broadcastmb_epi64:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
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; X64-NEXT: vpbroadcastmb2q %k0, %ymm0
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; X64-NEXT: retq
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entry:
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%0 = icmp eq <4 x i64> %a, %b
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%1 = shufflevector <4 x i1> %0, <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%2 = bitcast <8 x i1> %1 to i8
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%conv.i = zext i8 %2 to i64
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%vecinit.i.i = insertelement <4 x i64> undef, i64 %conv.i, i32 0
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%vecinit3.i.i = shufflevector <4 x i64> %vecinit.i.i, <4 x i64> undef, <4 x i32> zeroinitializer
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ret <4 x i64> %vecinit3.i.i
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}
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define <2 x i64> @test_mm_broadcastmw_epi32(<8 x i64> %a, <8 x i64> %b) {
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; CHECK-LABEL: test_mm_broadcastmw_epi32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
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; CHECK-NEXT: vpbroadcastmw2d %k0, %xmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%0 = bitcast <8 x i64> %a to <16 x i32>
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%1 = bitcast <8 x i64> %b to <16 x i32>
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%2 = icmp eq <16 x i32> %0, %1
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%3 = bitcast <16 x i1> %2 to i16
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%conv.i = zext i16 %3 to i32
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%vecinit.i.i = insertelement <4 x i32> undef, i32 %conv.i, i32 0
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%vecinit3.i.i = shufflevector <4 x i32> %vecinit.i.i, <4 x i32> undef, <4 x i32> zeroinitializer
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%4 = bitcast <4 x i32> %vecinit3.i.i to <2 x i64>
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ret <2 x i64> %4
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}
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define <4 x i64> @test_mm256_broadcastmw_epi32(<8 x i64> %a, <8 x i64> %b) {
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; CHECK-LABEL: test_mm256_broadcastmw_epi32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
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; CHECK-NEXT: vpbroadcastmw2d %k0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%0 = bitcast <8 x i64> %a to <16 x i32>
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%1 = bitcast <8 x i64> %b to <16 x i32>
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%2 = icmp eq <16 x i32> %0, %1
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%3 = bitcast <16 x i1> %2 to i16
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%conv.i = zext i16 %3 to i32
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%vecinit.i.i = insertelement <8 x i32> undef, i32 %conv.i, i32 0
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%vecinit7.i.i = shufflevector <8 x i32> %vecinit.i.i, <8 x i32> undef, <8 x i32> zeroinitializer
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%4 = bitcast <8 x i32> %vecinit7.i.i to <4 x i64>
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ret <4 x i64> %4
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}
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