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llvm-project/llvm/test/CodeGen
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Daniel Cederman c812dcc3db [Sparc] Do not depend on icc for ta 1 
The ta instruction will always trap, regardless of the value
of the integer condition codes. TRAPri is marked as using icc,
so we cannot use a pattern for TRAPri to implement ta 1, as
verify-machineinstrs can complain that icc is not defined.
Instead we implement ta 1 the same way as ta 5.

llvm-svn: 337236
 		2018-07-17 05:49:33 +00:00
..
AArch64 [Intrinsics] define funnel shift IR intrinsics + DAG builder support 2018-07-16 22:59:31 +00:00
AMDGPU [AMDGPU] [AMDGPU] Support a fdot2 pattern. 2018-07-16 18:19:59 +00:00
ARC
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ARM [ARM] Regenerated arg endian test 2018-07-13 09:16:56 +00:00
AVR [AVR] Set trackLivenessAfterRegAlloc 2018-06-11 14:46:48 +00:00
BPF
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Generic Implement strip.invariant.group 2018-07-02 04:49:30 +00:00
Hexagon [Hexagon] Avoid introducing calls into coalesced range of HVX vector pairs 2018-07-13 23:42:29 +00:00
Inputs
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Lanai Remove SETCCE use from Lanai's backend 2018-06-03 12:56:24 +00:00
MIR [DebugInfo][X86] Add start-after flags to MIR tests 2018-07-12 14:36:48 +00:00
MSP430 Emit a left-shift instead of a power-of-two multiply for jump-tables 2018-05-16 08:58:26 +00:00
Mips [MIPS GlobalISel] Select instructions to load and store i32 on stack 2018-07-16 13:29:32 +00:00
NVPTX finish: [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests 2018-07-11 20:31:51 +00:00
Nios2
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PowerPC [Intrinsics] define funnel shift IR intrinsics + DAG builder support 2018-07-16 22:59:31 +00:00
RISCV [RISCV] Add machine function pass to merge base + offset 2018-06-27 20:51:42 +00:00
SPARC [Sparc] Do not depend on icc for ta 1 2018-07-17 05:49:33 +00:00
SystemZ [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests 2018-07-11 20:25:49 +00:00
Thumb [CodeGen] Emit more precise AssertZext/AssertSext nodes. 2018-07-11 23:26:35 +00:00
Thumb2 [ARM] Treat cmn immediates as legal in isLegalICmpImmediate. 2018-07-10 23:44:37 +00:00
WebAssembly Add -allow-deprecated-dag-overlap to one of the experimental webassembly target tests. 2018-07-12 00:01:51 +00:00
WinCFGuard
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WinEH
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X86 [X86] Add full set of patterns for turning ceil/floor/trunc/rint/nearbyint into rndscale with loads, broadcast, and masking. 2018-07-17 05:48:48 +00:00
XCore [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X) 2018-07-15 16:27:07 +00:00