forked from OSchip/llvm-project
79 lines
2.9 KiB
LLVM
79 lines
2.9 KiB
LLVM
; RUN: llc -mtriple=aarch64-- -O0 -fast-isel -fast-isel-abort=4 -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: cmpxchg_monotonic_32:
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; CHECK: [[RETRY:.LBB[0-9_]+]]:
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; CHECK-NEXT: mov [[STATUS:w[0-9]+]], #0
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; CHECK-NEXT: ldaxr [[OLD:w[0-9]+]], [x0]
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; CHECK-NEXT: cmp [[OLD]], w1
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; CHECK-NEXT: b.ne [[DONE:.LBB[0-9_]+]]
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; CHECK-NEXT: // %bb.2:
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; CHECK-NEXT: stlxr [[STATUS]], w2, [x0]
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; CHECK-NEXT: cbnz [[STATUS]], [[RETRY]]
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; CHECK-NEXT: [[DONE]]:
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; CHECK-NEXT: cmp [[OLD]], w1
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; CHECK-NEXT: cset [[STATUS:w[0-9]+]], eq
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; CHECK-NEXT: and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1
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; CHECK-NEXT: str [[STATUS32]], [x3]
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; CHECK-NEXT: mov w0, [[OLD]]
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define i32 @cmpxchg_monotonic_32(i32* %p, i32 %cmp, i32 %new, i32* %ps) #0 {
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%tmp0 = cmpxchg i32* %p, i32 %cmp, i32 %new monotonic monotonic
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%tmp1 = extractvalue { i32, i1 } %tmp0, 0
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%tmp2 = extractvalue { i32, i1 } %tmp0, 1
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%tmp3 = zext i1 %tmp2 to i32
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store i32 %tmp3, i32* %ps
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ret i32 %tmp1
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}
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; CHECK-LABEL: cmpxchg_acq_rel_32_load:
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; CHECK: // %bb.0:
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; CHECK: ldr [[NEW:w[0-9]+]], [x2]
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; CHECK-NEXT: [[RETRY:.LBB[0-9_]+]]:
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; CHECK-NEXT: mov [[STATUS:w[0-9]+]], #0
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; CHECK-NEXT: ldaxr [[OLD:w[0-9]+]], [x0]
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; CHECK-NEXT: cmp [[OLD]], w1
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; CHECK-NEXT: b.ne [[DONE:.LBB[0-9_]+]]
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; CHECK-NEXT: // %bb.2:
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; CHECK-NEXT: stlxr [[STATUS]], [[NEW]], [x0]
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; CHECK-NEXT: cbnz [[STATUS]], [[RETRY]]
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; CHECK-NEXT: [[DONE]]:
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; CHECK-NEXT: cmp [[OLD]], w1
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; CHECK-NEXT: cset [[STATUS:w[0-9]+]], eq
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; CHECK-NEXT: and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1
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; CHECK-NEXT: str [[STATUS32]], [x3]
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; CHECK-NEXT: mov w0, [[OLD]]
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define i32 @cmpxchg_acq_rel_32_load(i32* %p, i32 %cmp, i32* %pnew, i32* %ps) #0 {
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%new = load i32, i32* %pnew
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%tmp0 = cmpxchg i32* %p, i32 %cmp, i32 %new acq_rel acquire
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%tmp1 = extractvalue { i32, i1 } %tmp0, 0
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%tmp2 = extractvalue { i32, i1 } %tmp0, 1
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%tmp3 = zext i1 %tmp2 to i32
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store i32 %tmp3, i32* %ps
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ret i32 %tmp1
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}
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; CHECK-LABEL: cmpxchg_seq_cst_64:
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; CHECK: [[RETRY:.LBB[0-9_]+]]:
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; CHECK-NEXT: mov [[STATUS:w[0-9]+]], #0
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; CHECK-NEXT: ldaxr [[OLD:x[0-9]+]], [x0]
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; CHECK-NEXT: cmp [[OLD]], x1
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; CHECK-NEXT: b.ne [[DONE:.LBB[0-9_]+]]
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; CHECK-NEXT: // %bb.2:
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; CHECK-NEXT: stlxr [[STATUS]], x2, [x0]
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; CHECK-NEXT: cbnz [[STATUS]], [[RETRY]]
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; CHECK-NEXT: [[DONE]]:
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; CHECK-NEXT: cmp [[OLD]], x1
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; CHECK-NEXT: cset [[STATUS:w[0-9]+]], eq
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; CHECK-NEXT: and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1
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; CHECK-NEXT: str [[STATUS32]], [x3]
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; CHECK-NEXT: mov x0, [[OLD]]
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define i64 @cmpxchg_seq_cst_64(i64* %p, i64 %cmp, i64 %new, i32* %ps) #0 {
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%tmp0 = cmpxchg i64* %p, i64 %cmp, i64 %new seq_cst seq_cst
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%tmp1 = extractvalue { i64, i1 } %tmp0, 0
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%tmp2 = extractvalue { i64, i1 } %tmp0, 1
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%tmp3 = zext i1 %tmp2 to i32
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store i32 %tmp3, i32* %ps
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ret i64 %tmp1
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}
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attributes #0 = { nounwind }
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