forked from OSchip/llvm-project
400 lines
8.6 KiB
LLVM
400 lines
8.6 KiB
LLVM
; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "arm64"
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define i1 @test_EQ_IllEbT(i64 %a, i64 %b) {
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; CHECK-LABEL: test_EQ_IllEbT
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; CHECK: cmn x1, x0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%add = sub i64 0, %b
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%cmp = icmp eq i64 %add, %a
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ret i1 %cmp
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}
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define i1 @test_EQ_IliEbT(i64 %a, i32 %b) {
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; CHECK-LABEL: test_EQ_IliEbT
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; CHECK: cmn x0, w1, sxtw
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = sext i32 %b to i64
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%add = sub i64 0, %a
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%cmp = icmp eq i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IlsEbT(i64 %a, i16 %b) {
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; CHECK-LABEL: test_EQ_IlsEbT
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; CHECK: cmn x0, w1, sxth
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %b to i64
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%add = sub i64 0, %a
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%cmp = icmp eq i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IlcEbT(i64 %a, i8 %b) {
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; CHECK-LABEL: test_EQ_IlcEbT
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; CHECK: cmn x0, w1, uxtb
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %b to i64
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%add = sub i64 0, %a
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%cmp = icmp eq i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IilEbT(i32 %a, i64 %b) {
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; CHECK-LABEL: test_EQ_IilEbT
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; CHECK: cmn x1, w0, sxtw
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = sext i32 %a to i64
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%add = sub i64 0, %b
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%cmp = icmp eq i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IiiEbT(i32 %a, i32 %b) {
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; CHECK-LABEL: test_EQ_IiiEbT
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; CHECK: cmn w1, w0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%add = sub i32 0, %b
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%cmp = icmp eq i32 %add, %a
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ret i1 %cmp
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}
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define i1 @test_EQ_IisEbT(i32 %a, i16 %b) {
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; CHECK-LABEL: test_EQ_IisEbT
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; CHECK: cmn w0, w1, sxth
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %b to i32
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%add = sub i32 0, %a
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IicEbT(i32 %a, i8 %b) {
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; CHECK-LABEL: test_EQ_IicEbT
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; CHECK: cmn w0, w1, uxtb
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %b to i32
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%add = sub i32 0, %a
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IslEbT(i16 %a, i64 %b) {
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; CHECK-LABEL: test_EQ_IslEbT
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; CHECK: cmn x1, w0, sxth
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %a to i64
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%add = sub i64 0, %b
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%cmp = icmp eq i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IsiEbT(i16 %a, i32 %b) {
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; CHECK-LABEL: test_EQ_IsiEbT
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; CHECK: cmn w1, w0, sxth
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %a to i32
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%add = sub i32 0, %b
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IssEbT(i16 %a, i16 %b) {
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; CHECK-LABEL: test_EQ_IssEbT
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; CHECK: sxth w8, w1
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; CHECK-NEXT: cmn w8, w0, sxth
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT; ret
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entry:
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%conv = sext i16 %a to i32
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%conv1 = sext i16 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IscEbT(i16 %a, i8 %b) {
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; CHECK-LABEL: test_EQ_IscEbT
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; CHECK: and w8, w1, #0xff
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; CHECK-NEXT: cmn w8, w0, sxth
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT; ret
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entry:
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%conv = sext i16 %a to i32
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%conv1 = zext i8 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IclEbT(i8 %a, i64 %b) {
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; CHECK-LABEL: test_EQ_IclEbT
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; CHECK: cmn x1, w0, uxtb
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i64
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%add = sub i64 0, %b
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%cmp = icmp eq i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IciEbT(i8 %a, i32 %b) {
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; CHECK-LABEL: test_EQ_IciEbT
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; CHECK: cmn w1, w0, uxtb
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i32
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%add = sub i32 0, %b
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IcsEbT(i8 %a, i16 %b) {
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; CHECK-LABEL: test_EQ_IcsEbT
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; CHECK: sxth w8, w1
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; CHECK-NEXT: cmn w8, w0, uxtb
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i32
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%conv1 = sext i16 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_EQ_IccEbT(i8 %a, i8 %b) {
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; CHECK-LABEL: test_EQ_IccEbT
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; CHECK: and w8, w1, #0xff
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; CHECK-NEXT: cmn w8, w0, uxtb
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i32
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%conv1 = zext i8 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp eq i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IllEbT(i64 %a, i64 %b) {
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; CHECK-LABEL: test_NE_IllEbT
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; CHECK: cmn x1, x0
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%add = sub i64 0, %b
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%cmp = icmp ne i64 %add, %a
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ret i1 %cmp
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}
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define i1 @test_NE_IliEbT(i64 %a, i32 %b) {
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; CHECK-LABEL: test_NE_IliEbT
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; CHECK: cmn x0, w1, sxtw
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i32 %b to i64
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%add = sub i64 0, %a
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%cmp = icmp ne i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IlsEbT(i64 %a, i16 %b) {
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; CHECK-LABEL: test_NE_IlsEbT
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; CHECK: cmn x0, w1, sxth
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %b to i64
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%add = sub i64 0, %a
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%cmp = icmp ne i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IlcEbT(i64 %a, i8 %b) {
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; CHECK-LABEL: test_NE_IlcEbT
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; CHECK: cmn x0, w1, uxtb
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %b to i64
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%add = sub i64 0, %a
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%cmp = icmp ne i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IilEbT(i32 %a, i64 %b) {
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; CHECK-LABEL: test_NE_IilEbT
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; CHECK: cmn x1, w0, sxtw
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i32 %a to i64
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%add = sub i64 0, %b
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%cmp = icmp ne i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IiiEbT(i32 %a, i32 %b) {
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; CHECK-LABEL: test_NE_IiiEbT
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; CHECK: cmn w1, w0
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%add = sub i32 0, %b
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%cmp = icmp ne i32 %add, %a
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ret i1 %cmp
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}
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define i1 @test_NE_IisEbT(i32 %a, i16 %b) {
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; CHECK-LABEL: test_NE_IisEbT
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; CHECK: cmn w0, w1, sxth
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %b to i32
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%add = sub i32 0, %a
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IicEbT(i32 %a, i8 %b) {
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; CHECK-LABEL: test_NE_IicEbT
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; CHECK: cmn w0, w1, uxtb
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %b to i32
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%add = sub i32 0, %a
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IslEbT(i16 %a, i64 %b) {
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; CHECK-LABEL: test_NE_IslEbT
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; CHECK: cmn x1, w0, sxth
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %a to i64
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%add = sub i64 0, %b
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%cmp = icmp ne i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IsiEbT(i16 %a, i32 %b) {
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; CHECK-LABEL: test_NE_IsiEbT
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; CHECK: cmn w1, w0, sxth
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %a to i32
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%add = sub i32 0, %b
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IssEbT(i16 %a, i16 %b) {
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; CHECK-LABEL:test_NE_IssEbT
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; CHECK: sxth w8, w1
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; CHECK-NEXT: cmn w8, w0, sxth
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %a to i32
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%conv1 = sext i16 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IscEbT(i16 %a, i8 %b) {
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; CHECK-LABEL:test_NE_IscEbT
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; CHECK: and w8, w1, #0xff
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; CHECK-NEXT: cmn w8, w0, sxth
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = sext i16 %a to i32
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%conv1 = zext i8 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IclEbT(i8 %a, i64 %b) {
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; CHECK-LABEL:test_NE_IclEbT
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; CHECK: cmn x1, w0, uxtb
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i64
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%add = sub i64 0, %b
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%cmp = icmp ne i64 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IciEbT(i8 %a, i32 %b) {
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; CHECK-LABEL:test_NE_IciEbT
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; CHECK: cmn w1, w0, uxtb
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i32
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%add = sub i32 0, %b
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IcsEbT(i8 %a, i16 %b) {
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; CHECK-LABEL:test_NE_IcsEbT
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; CHECK: sxth w8, w1
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; CHECK-NEXT: cmn w8, w0, uxtb
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i32
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%conv1 = sext i16 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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define i1 @test_NE_IccEbT(i8 %a, i8 %b) {
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; CHECK-LABEL:test_NE_IccEbT
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; CHECK: and w8, w1, #0xff
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; CHECK-NEXT: cmn w8, w0, uxtb
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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entry:
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%conv = zext i8 %a to i32
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%conv1 = zext i8 %b to i32
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%add = sub nsw i32 0, %conv1
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%cmp = icmp ne i32 %conv, %add
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ret i1 %cmp
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}
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