forked from OSchip/llvm-project
112 lines
3.0 KiB
YAML
112 lines
3.0 KiB
YAML
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL
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--- |
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define <8 x i16> @test_mul_v8i16(<8 x i16> %arg1, <8 x i16> %arg2) #0 {
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%ret = mul <8 x i16> %arg1, %arg2
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ret <8 x i16> %ret
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}
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define <4 x i32> @test_mul_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) #0 {
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%ret = mul <4 x i32> %arg1, %arg2
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ret <4 x i32> %ret
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}
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define <2 x i64> @test_mul_v2i64(<2 x i64> %arg1, <2 x i64> %arg2) #1 {
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%ret = mul <2 x i64> %arg1, %arg2
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ret <2 x i64> %ret
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}
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attributes #0 = { "target-features"="+sse4.1" }
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attributes #1 = { "target-features"="+sse4.1,+avx512vl,+avx512f,+avx512dq" }
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...
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---
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name: test_mul_v8i16
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# ALL-LABEL: name: test_mul_v8i16
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alignment: 4
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legalized: false
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regBankSelected: false
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: _ }
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# ALL-NEXT: - { id: 1, class: _ }
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# ALL-NEXT: - { id: 2, class: _ }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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# ALL: %0(<8 x s16>) = COPY %xmm0
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# ALL-NEXT: %1(<8 x s16>) = COPY %xmm1
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# ALL-NEXT: %2(<8 x s16>) = G_MUL %0, %1
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# ALL-NEXT: %xmm0 = COPY %2(<8 x s16>)
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# ALL-NEXT: RET 0, implicit %xmm0
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(<8 x s16>) = COPY %xmm0
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%1(<8 x s16>) = COPY %xmm1
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%2(<8 x s16>) = G_MUL %0, %1
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%xmm0 = COPY %2(<8 x s16>)
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RET 0, implicit %xmm0
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...
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---
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name: test_mul_v4i32
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# ALL-LABEL: name: test_mul_v4i32
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alignment: 4
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legalized: false
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regBankSelected: false
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: _ }
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# ALL-NEXT: - { id: 1, class: _ }
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# ALL-NEXT: - { id: 2, class: _ }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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# ALL: %0(<4 x s32>) = COPY %xmm0
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# ALL-NEXT: %1(<4 x s32>) = COPY %xmm1
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# ALL-NEXT: %2(<4 x s32>) = G_MUL %0, %1
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# ALL-NEXT: %xmm0 = COPY %2(<4 x s32>)
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# ALL-NEXT: RET 0, implicit %xmm0
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(<4 x s32>) = COPY %xmm0
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%1(<4 x s32>) = COPY %xmm1
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%2(<4 x s32>) = G_MUL %0, %1
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%xmm0 = COPY %2(<4 x s32>)
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RET 0, implicit %xmm0
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...
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---
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name: test_mul_v2i64
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# ALL-LABEL: name: test_mul_v2i64
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alignment: 4
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legalized: false
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regBankSelected: false
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: _ }
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# ALL-NEXT: - { id: 1, class: _ }
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# ALL-NEXT: - { id: 2, class: _ }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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# ALL: %0(<2 x s64>) = COPY %xmm0
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# ALL-NEXT: %1(<2 x s64>) = COPY %xmm1
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# ALL-NEXT: %2(<2 x s64>) = G_MUL %0, %1
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# ALL-NEXT: %xmm0 = COPY %2(<2 x s64>)
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# ALL-NEXT: RET 0, implicit %xmm0
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body: |
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bb.1 (%ir-block.0):
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liveins: %xmm0, %xmm1
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%0(<2 x s64>) = COPY %xmm0
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%1(<2 x s64>) = COPY %xmm1
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%2(<2 x s64>) = G_MUL %0, %1
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%xmm0 = COPY %2(<2 x s64>)
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RET 0, implicit %xmm0
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...
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