forked from OSchip/llvm-project
64 lines
1.9 KiB
LLVM
64 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=thumbv6-unknown-linux-gnu | FileCheck %s
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%umul.ty = type { i32, i1 }
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define i32 @test1(i32 %a, i1 %x) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, r5, r7, lr}
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; CHECK-NEXT: mov r5, r1
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; CHECK-NEXT: movs r2, #37
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; CHECK-NEXT: movs r4, #0
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; CHECK-NEXT: mov r1, r4
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; CHECK-NEXT: mov r3, r4
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; CHECK-NEXT: bl __muldi3
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; CHECK-NEXT: lsls r1, r5, #31
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; CHECK-NEXT: beq .LBB0_2
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: mvns r0, r4
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: pop {r4, r5, r7, pc}
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%tmp0 = tail call %umul.ty @llvm.umul.with.overflow.i32(i32 %a, i32 37)
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%tmp1 = extractvalue %umul.ty %tmp0, 0
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%tmp2 = select i1 %x, i32 -1, i32 %tmp1
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ret i32 %tmp2
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}
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declare %umul.ty @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
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define i32 @test2(i32* %m_degree) ssp {
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; CHECK-LABEL: test2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: movs r1, #7
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; CHECK-NEXT: lsls r1, r1, #29
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; CHECK-NEXT: ldr r0, [r0]
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; CHECK-NEXT: mov r2, r0
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; CHECK-NEXT: bics r2, r1
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; CHECK-NEXT: subs r1, r0, r2
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; CHECK-NEXT: subs r2, r1, #1
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; CHECK-NEXT: sbcs r1, r2
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; CHECK-NEXT: movs r4, #0
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; CHECK-NEXT: cmp r1, #0
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; CHECK-NEXT: bne .LBB1_2
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: lsls r0, r0, #3
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; CHECK-NEXT: b .LBB1_3
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; CHECK-NEXT: .LBB1_2:
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; CHECK-NEXT: mvns r0, r4
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; CHECK-NEXT: .LBB1_3:
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; CHECK-NEXT: bl _Znam
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; CHECK-NEXT: mov r0, r4
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; CHECK-NEXT: pop {r4, pc}
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%val = load i32, i32* %m_degree, align 4
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%res = call %umul.ty @llvm.umul.with.overflow.i32(i32 %val, i32 8)
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%ov = extractvalue %umul.ty %res, 1
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%mul = extractvalue %umul.ty %res, 0
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%sel = select i1 %ov, i32 -1, i32 %mul
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%ret = call noalias i8* @_Znam(i32 %sel)
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ret i32 0
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}
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declare noalias i8* @_Znam(i32)
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