.. |
AsmParser
|
[AArch64][AsmParser] NFC: Generalize LogicalImm[Not](32|64) code
|
2018-01-29 13:05:38 +00:00 |
Disassembler
|
Recommit r322073: [AArch64][SVE] Asm: Add predicated ADD/SUB instructions
|
2018-01-09 17:01:27 +00:00 |
InstPrinter
|
[AArch64][AsmParser] NFC: Generalize LogicalImm[Not](32|64) code
|
2018-01-29 13:05:38 +00:00 |
MCTargetDesc
|
[AArch64][AsmParser] NFC: Generalize LogicalImm[Not](32|64) code
|
2018-01-29 13:05:38 +00:00 |
TargetInfo
|
Add backend name to Target to enable runtime info to be fed back into TableGen
|
2017-11-15 23:55:44 +00:00 |
Utils
|
[AArch64][SVE] Asm: Predicate patterns
|
2018-01-22 10:46:00 +00:00 |
AArch64.h
|
[AArch64] Avoid SIMD interleaved store instruction for Exynos.
|
2017-12-08 00:58:49 +00:00 |
AArch64.td
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
AArch64A53Fix835769.cpp
|
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
|
2017-11-08 01:01:31 +00:00 |
AArch64A57FPLoadBalancing.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64AdvSIMDScalarPass.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64AsmPrinter.cpp
|
[CodeGen] Hoist common AsmPrinter code out of X86, ARM, and AArch64
|
2018-01-17 23:55:23 +00:00 |
AArch64CallLowering.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64CallLowering.h
|
GlobalISel (AArch64): fix ABI at border between GPRs and SP.
|
2017-08-21 21:56:11 +00:00 |
AArch64CallingConvention.h
|
Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
|
2017-11-08 01:01:31 +00:00 |
AArch64CallingConvention.td
|
AArch64: support SwiftCC properly on AAPCS64
|
2017-09-22 04:31:44 +00:00 |
AArch64CleanupLocalDynamicTLSPass.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64CollectLOH.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64CondBrTuning.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64ConditionOptimizer.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64ConditionalCompares.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64DeadRegisterDefinitionsPass.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64ExpandPseudoInsts.cpp
|
Fix a bunch more layering of CodeGen headers that are in Target
|
2017-11-17 01:07:10 +00:00 |
AArch64FalkorHWPFFix.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64FastISel.cpp
|
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
|
2018-01-19 17:13:12 +00:00 |
AArch64FrameLowering.cpp
|
AArch64: Fix emergency spillslot being out of reach for large callframes
|
2018-01-19 03:16:36 +00:00 |
AArch64FrameLowering.h
|
Move TargetFrameLowering.h to CodeGen where it's implemented
|
2017-11-03 22:32:11 +00:00 |
AArch64GenRegisterBankInfo.def
|
[AArch64][RegisterBankInfo] Teach instruction mapping about gpr32 -> fpr16 cross copies
|
2017-11-18 04:28:56 +00:00 |
AArch64ISelDAGToDAG.cpp
|
[SelectionDAGISel] Add a debug print before call to Select. Adjust where blank lines are printed during isel process to make things more sensibly grouped.
|
2018-01-26 19:34:20 +00:00 |
AArch64ISelLowering.cpp
|
Revert "AArch64: Omit callframe setup/destroy when not necessary"
|
2018-01-29 19:56:42 +00:00 |
AArch64ISelLowering.h
|
[AArch64] Enable aggressive FMA on T99 and provide AArch64 options for others.
|
2018-01-25 21:55:39 +00:00 |
AArch64InstrAtomics.td
|
[globalisel][tablegen] Add support for relative AtomicOrderings
|
2017-11-30 21:05:59 +00:00 |
AArch64InstrFormats.td
|
[AArch64][AsmParser] NFC: Generalize LogicalImm[Not](32|64) code
|
2018-01-29 13:05:38 +00:00 |
AArch64InstrInfo.cpp
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
AArch64InstrInfo.h
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
AArch64InstrInfo.td
|
[AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian
|
2018-01-17 14:39:29 +00:00 |
AArch64InstructionSelector.cpp
|
[AArch64][GlobalISel] Fall back during AArch64 isel if we have a volatile load.
|
2018-01-24 20:35:37 +00:00 |
AArch64LegalizerInfo.cpp
|
[globalisel][legalizer] Adapt LegalizerInfo to support inter-type dependencies and other things.
|
2018-01-29 19:54:49 +00:00 |
AArch64LegalizerInfo.h
|
[aarch64][globalisel] Define G_ATOMIC_CMPXCHG and G_ATOMICRMW_* and make them legal
|
2017-11-28 20:21:15 +00:00 |
AArch64LoadStoreOptimizer.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64MCInstLower.cpp
|
Fix a bunch more layering of CodeGen headers that are in Target
|
2017-11-17 01:07:10 +00:00 |
AArch64MCInstLower.h
|
[COFF, ARM64] Add support for Windows ARM64 COFF format
|
2017-06-27 23:58:19 +00:00 |
AArch64MachineFunctionInfo.h
|
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-07-25 23:51:02 +00:00 |
AArch64MacroFusion.cpp
|
Remove redundant includes from lib/Target/AArch64.
|
2017-12-14 10:36:20 +00:00 |
AArch64MacroFusion.h
|
Recommit rL305677: [CodeGen] Add generic MacroFusion pass
|
2017-06-19 12:53:31 +00:00 |
AArch64PBQPRegAlloc.cpp
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
AArch64PBQPRegAlloc.h
|
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-06-01 23:25:02 +00:00 |
AArch64PerfectShuffle.h
|
…
|
|
AArch64PromoteConstant.cpp
|
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-07-25 23:51:02 +00:00 |
AArch64RedundantCopyElimination.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64RegisterBankInfo.cpp
|
[AArch64] Map G_LOAD on FPR when the definition goes to a copy to FPR
|
2017-11-18 04:28:59 +00:00 |
AArch64RegisterBankInfo.h
|
[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
|
2017-11-02 23:38:19 +00:00 |
AArch64RegisterBanks.td
|
[aarch64][globalisel] Register banks and classes should have distinct names.
|
2017-10-18 00:12:43 +00:00 |
AArch64RegisterInfo.cpp
|
AArch64: Fix emergency spillslot being out of reach for large callframes
|
2018-01-19 03:16:36 +00:00 |
AArch64RegisterInfo.h
|
…
|
|
AArch64RegisterInfo.td
|
[AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.
|
2018-01-03 10:15:46 +00:00 |
AArch64SIMDInstrOpt.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64SVEInstrInfo.td
|
[AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
|
2018-01-19 15:22:00 +00:00 |
AArch64SchedA53.td
|
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
|
2017-11-07 15:03:11 +00:00 |
AArch64SchedA57.td
|
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
|
2017-11-07 15:03:11 +00:00 |
AArch64SchedA57WriteRes.td
|
…
|
|
AArch64SchedCyclone.td
|
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
|
2017-11-07 15:03:11 +00:00 |
AArch64SchedExynosM1.td
|
[AArch64] Change the filename of the Exynos M1 scheduling defs
|
2018-01-29 20:22:24 +00:00 |
AArch64SchedExynosM3.td
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
AArch64SchedFalkor.td
|
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
|
2017-11-07 15:03:11 +00:00 |
AArch64SchedFalkorDetails.td
|
[AArch64][Falkor] Remove some non-existent opcodes from sched detail regexes. NFC.
|
2017-06-23 21:59:09 +00:00 |
AArch64SchedKryo.td
|
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
|
2017-11-07 15:03:11 +00:00 |
AArch64SchedKryoDetails.td
|
[AArch64][Kryo] Add missing write latency for LDAXP, LDXP second destination.
|
2017-06-19 21:57:42 +00:00 |
AArch64SchedThunderX.td
|
[AArch64][SVE] Asm: Set SVE as unsupported feature for existing scheduler models.
|
2017-11-07 15:03:11 +00:00 |
AArch64SchedThunderX2T99.td
|
[AArch64] Remove Unsupported = 1 flag for the WriteAtomic WriteRes.
|
2018-01-11 16:50:56 +00:00 |
AArch64Schedule.td
|
…
|
|
AArch64SelectionDAGInfo.cpp
|
AArch64/X86: Factor out common bzero logic; NFC
|
2017-12-18 23:14:28 +00:00 |
AArch64SelectionDAGInfo.h
|
…
|
|
AArch64StorePairSuppress.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
AArch64Subtarget.cpp
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
AArch64Subtarget.h
|
[AArch64] Add pipeline model for Exynos M3
|
2018-01-30 15:40:16 +00:00 |
AArch64SystemOperands.td
|
[AArch64][SVE] Asm: Predicate patterns
|
2018-01-22 10:46:00 +00:00 |
AArch64TargetMachine.cpp
|
Add a TargetOption to enable/disable GlobalISel
|
2018-01-17 22:34:21 +00:00 |
AArch64TargetMachine.h
|
(Re-landing) Expose a TargetMachine::getTargetTransformInfo function
|
2017-12-22 18:21:59 +00:00 |
AArch64TargetObjectFile.cpp
|
Move Object format code to lib/BinaryFormat.
|
2017-06-07 03:48:56 +00:00 |
AArch64TargetObjectFile.h
|
Fix a bunch more layering of CodeGen headers that are in Target
|
2017-11-17 01:07:10 +00:00 |
AArch64TargetTransformInfo.cpp
|
Fix -Wsign-compare warnings on Windows
|
2018-01-05 19:53:51 +00:00 |
AArch64TargetTransformInfo.h
|
[AArch64] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-07-25 23:51:02 +00:00 |
CMakeLists.txt
|
[AArch64] Rename AArch64VecorByElementOpt.cpp into AArch64SIMDInstrOpt.cpp to reflect the recently added features.
|
2017-12-08 22:04:13 +00:00 |
LLVMBuild.txt
|
…
|
|
SVEInstrFormats.td
|
[AArch64][SVE] Asm: PTRUE and PTRUES instructions
|
2018-01-22 15:29:19 +00:00 |