forked from OSchip/llvm-project
fba48fcf44
The R_MIPS_JALR relocation denotes jalr/jr instructions in position independent code. Both these instructions take a target's address from the $25 register. If offset to the target symbol fits into the 18-bits, it's more efficient to replace jalr/jr by bal/b instructions. Differential Revision: https://reviews.llvm.org/D68057 llvm-svn: 372951 |
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| .. | ||
| AArch64.cpp | ||
| AMDGPU.cpp | ||
| ARM.cpp | ||
| AVR.cpp | ||
| Hexagon.cpp | ||
| MSP430.cpp | ||
| Mips.cpp | ||
| MipsArchTree.cpp | ||
| PPC.cpp | ||
| PPC64.cpp | ||
| RISCV.cpp | ||
| SPARCV9.cpp | ||
| X86.cpp | ||
| X86_64.cpp | ||