Scott Linder eb1f75d561 [AMDGPU] Fix VGPR spills where offset doesn't fit in 12 bits ... Scale the offset of VGPR spills by the wave size when it cannot fit in the 12-bit offset immediate field and so is added to the soffset SGPR. This accounts for hardware swizzling of scratch memory. Differential Revision: https://reviews.llvm.org/D49448 llvm-svn: 338060		2018-07-26 19:47:51 +00:00
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AArch64	MacroFusion: Fix macro fusion with ExitSU failing in top-down scheduling	2018-07-26 17:43:56 +00:00
AMDGPU	[AMDGPU] Fix VGPR spills where offset doesn't fit in 12 bits	2018-07-26 19:47:51 +00:00
ARC	…
ARM	Fix PR34170: Crash on inline asm with 64bit output in 32bit GPR	2018-07-25 11:11:12 +00:00
AVR	[AVR] Set trackLivenessAfterRegAlloc	2018-06-11 14:46:48 +00:00
BPF	bpf: new option -bpf-expand-memcpy-in-order to expand memcpy in order	2018-07-25 22:40:02 +00:00
Generic	Implement strip.invariant.group	2018-07-02 04:49:30 +00:00
Hexagon	[Hexagon] Properly scale bit index when extracting elements from vNi1	2018-07-25 16:20:59 +00:00
Inputs	…
Lanai	Remove SETCCE use from Lanai's backend	2018-06-03 12:56:24 +00:00
MIR	[DebugInfo][X86] Add start-after flags to MIR tests	2018-07-12 14:36:48 +00:00
MSP430	…
Mips	[mips] Sign extend i32 return values on MIPS64	2018-07-26 10:59:35 +00:00
NVPTX	finish: [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests	2018-07-11 20:31:51 +00:00
Nios2	…
PowerPC	[SelectionDAG] try to convert funnel shift directly to rotate if legal	2018-07-25 21:38:30 +00:00
RISCV	[RISCV] Add support for _interrupt attribute	2018-07-26 17:49:43 +00:00
SPARC	Regenerate remainder test.	2018-07-20 13:14:29 +00:00
SystemZ	[SystemZ] Test case formatting fixes	2018-07-20 12:12:10 +00:00
Thumb	[ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.	2018-07-25 18:22:22 +00:00
Thumb2	[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.	2018-07-10 23:44:37 +00:00
WebAssembly	[WebAssembly] Add tests for weaker memory consistency orderings	2018-07-24 21:06:44 +00:00
WinCFGuard	…
WinEH	…
X86	[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle ule,ugt CondCodes.	2018-07-26 17:34:28 +00:00
XCore	[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)	2018-07-15 16:27:07 +00:00