forked from OSchip/llvm-project
66d60e06cb
These should probably be inferred from the function on parse, but the target specific infrastructure currently does not give you a way to do this. SILowerSGPRSpills early exits without this reporting spills, which makes it difficult to write a MIR test for. |
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| .. | ||
| expected-target-index-name.mir | ||
| intrinsics.mir | ||
| invalid-target-index-operand.mir | ||
| lit.local.cfg | ||
| llc-target-cpu-attr-from-cmdline-ir.mir | ||
| llc-target-cpu-attr-from-cmdline.mir | ||
| load-store-opt-dlc.mir | ||
| machine-function-info-no-ir.mir | ||
| machine-function-info-register-parse-error1.mir | ||
| machine-function-info-register-parse-error2.mir | ||
| machine-function-info.ll | ||
| mfi-frame-offset-reg-class.mir | ||
| mfi-parse-error-frame-offset-reg.mir | ||
| mfi-parse-error-scratch-rsrc-reg.mir | ||
| mfi-parse-error-stack-ptr-offset-reg.mir | ||
| mfi-scratch-rsrc-reg-reg-class.mir | ||
| mfi-stack-ptr-offset-reg-class.mir | ||
| mir-canon-multi.mir | ||
| mircanon-memoperands.mir | ||
| parse-order-reserved-regs.mir | ||
| stack-id.mir | ||
| syncscopes.mir | ||
| target-flags.mir | ||
| target-index-operands.mir | ||