forked from OSchip/llvm-project
998 lines
33 KiB
YAML
998 lines
33 KiB
YAML
# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination -o - %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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...
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# GCN-LABEL: name: s_fold_and_imm_regimm_32{{$}}
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# GCN: %10:vgpr_32 = V_MOV_B32_e32 1543, implicit $exec
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# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
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name: s_fold_and_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%2:sreg_32_xm0 = COPY %1.sub1
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%3:sreg_32_xm0 = COPY %1.sub0
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%4:sreg_32_xm0 = S_MOV_B32 61440
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%5:sreg_32_xm0 = S_MOV_B32 -1
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%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.hi16, killed %3, %subreg.lo16, killed %4, %subreg.sub0, killed %5, %subreg.sub0_sub1
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%7:sreg_32_xm0 = S_MOV_B32 1234567
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%8:sreg_32_xm0 = S_MOV_B32 9999
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%9:sreg_32_xm0 = S_AND_B32 killed %7, killed %8, implicit-def dead $scc
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%10:vgpr_32 = COPY %9
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BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: v_fold_and_imm_regimm_32{{$}}
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# GCN: [[VAL0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL0]],
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# GCN: [[VAL1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL1]],
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# GCN: [[VAL2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL2]],
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# GCN: [[VAL3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL3]],
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# GCN: [[VAL4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL4]],
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name: v_fold_and_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%3' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%3:vgpr_32 = COPY $vgpr0
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%13:vgpr_32 = V_ASHRREV_I32_e64 31, %3, implicit $exec
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%14:vreg_64 = REG_SEQUENCE %3, %subreg.hi16, %13, %subreg.lo16
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%15:vreg_64 = V_LSHLREV_B64 2, killed %14, implicit $exec
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%5:sreg_32_xm0 = COPY %4.sub1
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%20:vgpr_32 = V_ADD_CO_U32_e32 %4.sub0, %15.sub0, implicit-def $vcc, implicit $exec
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%18:vgpr_32 = COPY killed %5
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%17:vgpr_32 = V_ADDC_U32_e32 %15.sub1, %18, implicit-def $vcc, implicit $vcc, implicit $exec
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%19:vreg_64 = REG_SEQUENCE %20, %subreg.hi16, killed %17, %subreg.lo16
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%6:vgpr_32 = V_MOV_B32_e32 982, implicit $exec
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%8:sreg_32_xm0 = S_MOV_B32 1234567
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%16:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
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%9:vgpr_32 = V_AND_B32_e64 %8, %6, implicit $exec
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FLAT_STORE_DWORD %19, %9, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%10:vgpr_32 = V_AND_B32_e64 %6, %8, implicit $exec
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FLAT_STORE_DWORD %19, %10, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%11:vgpr_32 = V_AND_B32_e32 %8, %6, implicit $exec
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FLAT_STORE_DWORD %19, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%12:vgpr_32 = V_AND_B32_e64 %8, %8, implicit $exec
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FLAT_STORE_DWORD %19, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%13:vgpr_32 = V_AND_B32_e64 %16, %16, implicit $exec
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FLAT_STORE_DWORD %19, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: s_fold_shl_imm_regimm_32{{$}}
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# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
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# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]],
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name: s_fold_shl_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%5:sreg_32_xm0_xexec = S_MOV_B32 1
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%6:sreg_32_xm0 = COPY %4.sub1
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%7:sreg_32_xm0 = COPY %4.sub0
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%8:sreg_32_xm0 = S_MOV_B32 61440
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%9:sreg_32_xm0 = S_MOV_B32 -1
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%10:sgpr_128 = REG_SEQUENCE killed %7, %subreg.hi16, killed %6, %subreg.lo16, killed %9, %subreg.sub0, killed %8, %subreg.sub0_sub1
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%12:sreg_32_xm0 = S_LSHL_B32 killed %5, 12, implicit-def dead $scc
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%13:vgpr_32 = COPY %12
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BUFFER_STORE_DWORD_OFFSET killed %13, killed %10, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: s_fold_ashr_imm_regimm_32{{$}}
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# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 243, implicit $exec
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# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]], killed %7,
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name: s_fold_ashr_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%2:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%3:sreg_32_xm0_xexec = S_MOV_B32 999123
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%4:sreg_32_xm0 = COPY %2.sub1
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%5:sreg_32_xm0 = COPY %2.sub0
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%6:sreg_32_xm0 = S_MOV_B32 61440
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%7:sreg_32_xm0 = S_MOV_B32 -1
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%8:sgpr_128 = REG_SEQUENCE killed %5, %subreg.hi16, killed %4, %subreg.lo16, killed %7, %subreg.sub0, killed %6, %subreg.sub0_sub1
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%10:sreg_32_xm0 = S_ASHR_I32 killed %3, 12, implicit-def dead $scc
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%11:vgpr_32 = COPY %10
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BUFFER_STORE_DWORD_OFFSET killed %11, killed %8, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: v_fold_ashr_imm_regimm_32{{$}}
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# GCN: [[VAL0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL0]],
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# GCN: [[VAL1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL1]],
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# GCN: [[VAL2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL2]],
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# GCN: [[VAL3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL3]],
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# GCN: [[VAL4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL4]],
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# GCN: [[VAL5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL5]],
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# GCN: [[VAL6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL6]],
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# GCN: [[VAL7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL7]],
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# GCN: [[VAL8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL8]],
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# GCN: [[VAL9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL9]],
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name: v_fold_ashr_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%2' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%2:vgpr_32 = COPY $vgpr0
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
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%16:vreg_64 = REG_SEQUENCE %2, %subreg.hi16, %15, %subreg.lo16
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%17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec
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%9:sreg_32_xm0 = COPY %3.sub1
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%21:vgpr_32 = V_ADD_CO_U32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
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%19:vgpr_32 = COPY killed %9
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%18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
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%20:vreg_64 = REG_SEQUENCE %21, %subreg.hi16, killed %18, %subreg.lo16
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%10:vgpr_32 = V_MOV_B32_e32 999234234, implicit $exec
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%24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec
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%6:vgpr_32 = V_MOV_B32_e32 1000000, implicit $exec
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%7:sreg_32_xm0 = S_MOV_B32 13424252
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%8:sreg_32_xm0 = S_MOV_B32 4
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%27:sreg_32_xm0 = S_MOV_B32 -4
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%29:sreg_32_xm0 = S_MOV_B32 1
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%30:sreg_32_xm0 = S_MOV_B32 3841
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%31:vgpr_32 = V_MOV_B32_e32 3841, implicit $exec
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%32:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
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%11:vgpr_32 = V_ASHRREV_I32_e64 8, %10, implicit $exec
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FLAT_STORE_DWORD %20, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%12:vgpr_32 = V_ASHRREV_I32_e64 %8, %10, implicit $exec
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FLAT_STORE_DWORD %20, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%13:vgpr_32 = V_ASHR_I32_e64 %7, 3, implicit $exec
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FLAT_STORE_DWORD %20, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%14:vgpr_32 = V_ASHR_I32_e64 7, %29, implicit $exec
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FLAT_STORE_DWORD %20, %14, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%15:vgpr_32 = V_ASHR_I32_e64 %27, %24, implicit $exec
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FLAT_STORE_DWORD %20, %15, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%22:vgpr_32 = V_ASHR_I32_e64 %6, 4, implicit $exec
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FLAT_STORE_DWORD %20, %22, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%23:vgpr_32 = V_ASHR_I32_e64 %6, %30, implicit $exec
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FLAT_STORE_DWORD %20, %23, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%25:vgpr_32 = V_ASHR_I32_e32 %31, %31, implicit $exec
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FLAT_STORE_DWORD %20, %25, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%26:vgpr_32 = V_ASHRREV_I32_e32 11, %10, implicit $exec
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FLAT_STORE_DWORD %20, %26, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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%28:vgpr_32 = V_ASHR_I32_e32 %27, %32, implicit $exec
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FLAT_STORE_DWORD %20, %28, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: s_fold_lshr_imm_regimm_32{{$}}
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# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1048332, implicit $exec
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# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]], killed %7,
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name: s_fold_lshr_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%2:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%3:sreg_32_xm0_xexec = S_MOV_B32 -999123
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%4:sreg_32_xm0 = COPY %2.sub1
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%5:sreg_32_xm0 = COPY %2.sub0
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%6:sreg_32_xm0 = S_MOV_B32 61440
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%7:sreg_32_xm0 = S_MOV_B32 -1
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%8:sgpr_128 = REG_SEQUENCE killed %5, %subreg.hi16, killed %4, %subreg.lo16, killed %7, %subreg.sub0, killed %6, %subreg.sub0_sub1
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%10:sreg_32_xm0 = S_LSHR_B32 killed %3, 12, implicit-def dead $scc
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%11:vgpr_32 = COPY %10
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BUFFER_STORE_DWORD_OFFSET killed %11, killed %8, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# GCN-LABEL: name: v_fold_lshr_imm_regimm_32{{$}}
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# GCN: [[VAL0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL0]],
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# GCN: [[VAL1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL1]],
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# GCN: [[VAL2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL2]],
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# GCN: [[VAL3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL3]],
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# GCN: [[VAL4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL4]],
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# GCN: [[VAL5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL5]],
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# GCN: [[VAL6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL6]],
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# GCN: [[VAL7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL7]],
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# GCN: [[VAL8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL8]],
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# GCN: [[VAL9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741823, implicit $exec
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# GCN: FLAT_STORE_DWORD %10, [[VAL9]],
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name: v_fold_lshr_imm_regimm_32
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
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- { reg: '$vgpr0', virtual-reg: '%2' }
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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%2:vgpr_32 = COPY $vgpr0
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
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%15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
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%16:vreg_64 = REG_SEQUENCE %2, %subreg.hi16, %15, %subreg.lo16
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%17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec
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%9:sreg_32_xm0 = COPY %3.sub1
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%21:vgpr_32 = V_ADD_CO_U32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
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%19:vgpr_32 = COPY killed %9
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%18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
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%20:vreg_64 = REG_SEQUENCE %21, %subreg.hi16, killed %18, %subreg.lo16
|
|
%10:vgpr_32 = V_MOV_B32_e32 999234234, implicit $exec
|
|
%24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec
|
|
%6:vgpr_32 = V_MOV_B32_e32 1000000, implicit $exec
|
|
%7:sreg_32_xm0 = S_MOV_B32 13424252
|
|
%8:sreg_32_xm0 = S_MOV_B32 4
|
|
%27:sreg_32_xm0 = S_MOV_B32 -4
|
|
%29:sreg_32_xm0 = S_MOV_B32 1
|
|
%30:sreg_32_xm0 = S_MOV_B32 3841
|
|
%31:vgpr_32 = V_MOV_B32_e32 3841, implicit $exec
|
|
%32:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
|
|
|
|
%11:vgpr_32 = V_LSHRREV_B32_e64 8, %10, implicit $exec
|
|
FLAT_STORE_DWORD %20, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%12:vgpr_32 = V_LSHRREV_B32_e64 %8, %10, implicit $exec
|
|
FLAT_STORE_DWORD %20, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%13:vgpr_32 = V_LSHR_B32_e64 %7, 3, implicit $exec
|
|
FLAT_STORE_DWORD %20, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%14:vgpr_32 = V_LSHR_B32_e64 7, %29, implicit $exec
|
|
FLAT_STORE_DWORD %20, %14, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%15:vgpr_32 = V_LSHR_B32_e64 %27, %24, implicit $exec
|
|
FLAT_STORE_DWORD %20, %15, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%22:vgpr_32 = V_LSHR_B32_e64 %6, 4, implicit $exec
|
|
FLAT_STORE_DWORD %20, %22, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%23:vgpr_32 = V_LSHR_B32_e64 %6, %30, implicit $exec
|
|
FLAT_STORE_DWORD %20, %23, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%25:vgpr_32 = V_LSHR_B32_e32 %31, %31, implicit $exec
|
|
FLAT_STORE_DWORD %20, %25, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%26:vgpr_32 = V_LSHRREV_B32_e32 11, %10, implicit $exec
|
|
FLAT_STORE_DWORD %20, %26, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
|
|
%28:vgpr_32 = V_LSHR_B32_e32 %27, %32, implicit $exec
|
|
FLAT_STORE_DWORD %20, %28, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
# There is only an undef use operand for %1, so there is no
|
|
# corresponding defining instruction
|
|
|
|
# GCN-LABEL: name: undefined_vreg_operand{{$}}
|
|
# GCN: bb.0
|
|
# GCN-NEXT: FLAT_STORE_DWORD undef %3:vreg_64, undef %2:vgpr_32,
|
|
# GCN-NEXT: S_ENDPGM 0
|
|
name: undefined_vreg_operand
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%2:vgpr_32 = V_XOR_B32_e64 killed %0, undef %1:vgpr_32, implicit $exec
|
|
FLAT_STORE_DWORD undef %3:vreg_64, %2, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
# Make sure there is no crash if one of the operands is a physical register
|
|
# GCN-LABEL: name: constant_fold_physreg_op{{$}}
|
|
# GCN: %3:sreg_64 = S_AND_B64 $exec, 0, implicit-def dead $scc
|
|
|
|
name: constant_fold_physreg_op
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
successors: %bb.1, %bb.3
|
|
liveins: $vgpr0, $sgpr4_sgpr5
|
|
|
|
%19:sreg_64 = IMPLICIT_DEF
|
|
%0:sreg_64 = SI_IF killed %19, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1:
|
|
%6:sreg_64 = S_MOV_B64 0
|
|
%7:sreg_64 = S_AND_B64 $exec, killed %6, implicit-def dead $scc
|
|
$vcc = COPY %7
|
|
|
|
bb.3:
|
|
liveins: $vcc
|
|
SI_END_CF %0, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
|
S_ENDPGM 0, implicit $vcc
|
|
|
|
...
|
|
---
|
|
# GCN-LABEL: name: constant_fold_lshl_or_reg0_immreg_reg{{$}}
|
|
# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM 0, implicit %2
|
|
|
|
name: constant_fold_lshl_or_reg0_immreg_reg
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_LSHL_OR_B32 %0,%1, $vgpr0, implicit $exec
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# GCN-LABEL: name: constant_fold_lshl_or_reg0_immreg_imm{{$}}
|
|
# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM 0, implicit %2
|
|
|
|
name: constant_fold_lshl_or_reg0_immreg_imm
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_LSHL_OR_B32 %0, %1, 10, implicit $exec
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# GCN-LABEL: name: constant_fold_lshl_or_reg0_immreg_immreg{{$}}
|
|
# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM 0, implicit %3
|
|
|
|
name: constant_fold_lshl_or_reg0_immreg_immreg
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
|
|
%3:vgpr_32 = V_LSHL_OR_B32 %0, %1, %2, implicit $exec
|
|
S_ENDPGM 0, implicit %3
|
|
|
|
...
|
|
|
|
---
|
|
# GCN-LABEL: name: s_fold_andn2_imm_regimm_32{{$}}
|
|
# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1233024, implicit $exec
|
|
# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]],
|
|
name: s_fold_andn2_imm_regimm_32
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%2:sreg_32_xm0 = COPY %1.sub1
|
|
%3:sreg_32_xm0 = COPY %1.sub0
|
|
%4:sreg_32_xm0 = S_MOV_B32 61440
|
|
%5:sreg_32_xm0 = S_MOV_B32 -1
|
|
%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
|
|
%7:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%8:sreg_32_xm0 = S_MOV_B32 9999
|
|
%9:sreg_32_xm0 = S_ANDN2_B32 killed %7, killed %8, implicit-def dead $scc
|
|
%10:vgpr_32 = COPY %9
|
|
BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: name: s_fold_or_imm_regimm_32{{$}}
|
|
# GCN: %10:vgpr_32 = V_MOV_B32_e32 1243023, implicit $exec
|
|
# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
|
|
name: s_fold_or_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%2:sreg_32_xm0 = COPY %1.sub1
|
|
%3:sreg_32_xm0 = COPY %1.sub0
|
|
%4:sreg_32_xm0 = S_MOV_B32 61440
|
|
%5:sreg_32_xm0 = S_MOV_B32 -1
|
|
%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
|
|
%7:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%8:sreg_32_xm0 = S_MOV_B32 9999
|
|
%9:sreg_32_xm0 = S_OR_B32 killed %7, killed %8, implicit-def dead $scc
|
|
%10:vgpr_32 = COPY %9
|
|
BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: name: v_fold_or_imm_regimm_32{{$}}
|
|
|
|
# GCN: %14:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %14,
|
|
|
|
# GCN: %15:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %15
|
|
|
|
# GCN: %16:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %16,
|
|
|
|
# GCN: %17:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %17,
|
|
|
|
# GCN: %3:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %3,
|
|
|
|
name: v_fold_or_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
- { reg: '$vgpr0', virtual-reg: '%3' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1, $vgpr0
|
|
|
|
%3:vgpr_32 = COPY $vgpr0
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%13:vgpr_32 = V_ASHRREV_I32_e64 31, %3, implicit $exec
|
|
%14:vreg_64 = REG_SEQUENCE %3, %subreg.sub0, %13, %subreg.sub1
|
|
%15:vreg_64 = V_LSHLREV_B64 2, killed %14, implicit $exec
|
|
%5:sreg_32_xm0 = COPY %4.sub1
|
|
%20:vgpr_32 = V_ADD_CO_U32_e32 %4.sub0, %15.sub0, implicit-def $vcc, implicit $exec
|
|
%18:vgpr_32 = COPY killed %5
|
|
%17:vgpr_32 = V_ADDC_U32_e32 %15.sub1, %18, implicit-def $vcc, implicit $vcc, implicit $exec
|
|
%19:vreg_64 = REG_SEQUENCE %20, %subreg.sub0, killed %17, %subreg.sub1
|
|
%6:vgpr_32 = V_MOV_B32_e32 982, implicit $exec
|
|
%8:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%16:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
|
|
%9:vgpr_32 = V_OR_B32_e64 %8, %6, implicit $exec
|
|
FLAT_STORE_DWORD %19, %9, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%10:vgpr_32 = V_OR_B32_e64 %6, %8, implicit $exec
|
|
FLAT_STORE_DWORD %19, %10, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%11:vgpr_32 = V_OR_B32_e32 %8, %6, implicit $exec
|
|
FLAT_STORE_DWORD %19, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%12:vgpr_32 = V_OR_B32_e64 %8, %8, implicit $exec
|
|
FLAT_STORE_DWORD %19, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%13:vgpr_32 = V_OR_B32_e64 %16, %16, implicit $exec
|
|
FLAT_STORE_DWORD %19, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: name: s_fold_orn2_imm_regimm_32{{$}}
|
|
# GCN: %10:vgpr_32 = V_MOV_B32_e32 -8457, implicit $exec
|
|
# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
|
|
name: s_fold_orn2_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%2:sreg_32_xm0 = COPY %1.sub1
|
|
%3:sreg_32_xm0 = COPY %1.sub0
|
|
%4:sreg_32_xm0 = S_MOV_B32 61440
|
|
%5:sreg_32_xm0 = S_MOV_B32 -1
|
|
%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
|
|
%7:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%8:sreg_32_xm0 = S_MOV_B32 9999
|
|
%9:sreg_32_xm0 = S_ORN2_B32 killed %7, killed %8, implicit-def dead $scc
|
|
%10:vgpr_32 = COPY %9
|
|
BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: name: s_fold_nand_imm_regimm_32{{$}}
|
|
# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1544, implicit $exec
|
|
# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
|
|
name: s_fold_nand_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%2:sreg_32_xm0 = COPY %1.sub1
|
|
%3:sreg_32_xm0 = COPY %1.sub0
|
|
%4:sreg_32_xm0 = S_MOV_B32 61440
|
|
%5:sreg_32_xm0 = S_MOV_B32 -1
|
|
%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
|
|
%7:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%8:sreg_32_xm0 = S_MOV_B32 9999
|
|
%9:sreg_32_xm0 = S_NAND_B32 killed %7, killed %8, implicit-def dead $scc
|
|
%10:vgpr_32 = COPY %9
|
|
BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: name: s_fold_nor_imm_regimm_32{{$}}
|
|
# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1243024, implicit $exec
|
|
# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
|
|
name: s_fold_nor_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%2:sreg_32_xm0 = COPY %1.sub1
|
|
%3:sreg_32_xm0 = COPY %1.sub0
|
|
%4:sreg_32_xm0 = S_MOV_B32 61440
|
|
%5:sreg_32_xm0 = S_MOV_B32 -1
|
|
%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
|
|
%7:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%8:sreg_32_xm0 = S_MOV_B32 9999
|
|
%9:sreg_32_xm0 = S_NOR_B32 killed %7, killed %8, implicit-def dead $scc
|
|
%10:vgpr_32 = COPY %9
|
|
BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: name: s_fold_xnor_imm_regimm_32{{$}}
|
|
# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1241481, implicit $exec
|
|
# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
|
|
name: s_fold_xnor_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0
|
|
%2:sreg_32_xm0 = COPY %1.sub1
|
|
%3:sreg_32_xm0 = COPY %1.sub0
|
|
%4:sreg_32_xm0 = S_MOV_B32 61440
|
|
%5:sreg_32_xm0 = S_MOV_B32 -1
|
|
%6:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0, killed %3, %subreg.sub1, killed %4, %subreg.sub2, killed %5, %subreg.sub3
|
|
%7:sreg_32_xm0 = S_MOV_B32 1234567
|
|
%8:sreg_32_xm0 = S_MOV_B32 9999
|
|
%9:sreg_32_xm0 = S_XNOR_B32 killed %7, killed %8, implicit-def dead $scc
|
|
%10:vgpr_32 = COPY %9
|
|
BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, 0, 0, implicit $exec
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
|
|
---
|
|
# GCN-LABEL: name: v_fold_shl_imm_regimm_32{{$}}
|
|
|
|
# GCN: %16:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %16,
|
|
|
|
# GCN: %17:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %17,
|
|
|
|
# GCN: %18:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %18,
|
|
|
|
# GCN: %19:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %19,
|
|
|
|
# GCN: %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %3,
|
|
|
|
# GCN: %20:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %20,
|
|
|
|
# GCN: %21:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %21,
|
|
|
|
# GCN: %22:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %22,
|
|
|
|
# GCN: %23:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %23,
|
|
|
|
# GCN: %24:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
|
|
# GCN: FLAT_STORE_DWORD %10, %24,
|
|
|
|
name: v_fold_shl_imm_regimm_32
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
liveins:
|
|
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
|
|
- { reg: '$vgpr0', virtual-reg: '%2' }
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1, $vgpr0
|
|
|
|
%2:vgpr_32 = COPY $vgpr0
|
|
%0:sgpr_64 = COPY $sgpr0_sgpr1
|
|
%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`, addrspace 4)
|
|
%15:vgpr_32 = V_ASHRREV_I32_e64 31, %2, implicit $exec
|
|
%16:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %15, %subreg.sub1
|
|
%17:vreg_64 = V_LSHLREV_B64 2, killed %16, implicit $exec
|
|
%9:sreg_32_xm0 = COPY %3.sub1
|
|
%21:vgpr_32 = V_ADD_CO_U32_e32 %3.sub0, %17.sub0, implicit-def $vcc, implicit $exec
|
|
%19:vgpr_32 = COPY killed %9
|
|
%18:vgpr_32 = V_ADDC_U32_e32 %17.sub1, %19, implicit-def $vcc, implicit $vcc, implicit $exec
|
|
%20:vreg_64 = REG_SEQUENCE %21, %subreg.sub0, killed %18, %subreg.sub1
|
|
%10:vgpr_32 = V_MOV_B32_e32 9999, implicit $exec
|
|
%24:vgpr_32 = V_MOV_B32_e32 3871, implicit $exec
|
|
%6:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
|
%7:sreg_32_xm0 = S_MOV_B32 1
|
|
%27:sreg_32_xm0 = S_MOV_B32 -4
|
|
%11:vgpr_32 = V_LSHLREV_B32_e64 12, %10, implicit $exec
|
|
FLAT_STORE_DWORD %20, %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%12:vgpr_32 = V_LSHLREV_B32_e64 %7, 12, implicit $exec
|
|
FLAT_STORE_DWORD %20, %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%13:vgpr_32 = V_LSHL_B32_e64 %7, 12, implicit $exec
|
|
FLAT_STORE_DWORD %20, %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%14:vgpr_32 = V_LSHL_B32_e64 12, %7, implicit $exec
|
|
FLAT_STORE_DWORD %20, %14, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%15:vgpr_32 = V_LSHL_B32_e64 12, %24, implicit $exec
|
|
FLAT_STORE_DWORD %20, %15, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%22:vgpr_32 = V_LSHL_B32_e64 %6, 12, implicit $exec
|
|
FLAT_STORE_DWORD %20, %22, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%23:vgpr_32 = V_LSHL_B32_e64 %6, 32, implicit $exec
|
|
FLAT_STORE_DWORD %20, %23, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%25:vgpr_32 = V_LSHL_B32_e32 %6, %6, implicit $exec
|
|
FLAT_STORE_DWORD %20, %25, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%26:vgpr_32 = V_LSHLREV_B32_e32 11, %24, implicit $exec
|
|
FLAT_STORE_DWORD %20, %26, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
%28:vgpr_32 = V_LSHL_B32_e32 %27, %6, implicit $exec
|
|
FLAT_STORE_DWORD %20, %28, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
|
|
S_ENDPGM 0
|
|
|
|
...
|
|
|
|
---
|
|
# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_reg{{$}}
|
|
# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM
|
|
|
|
name: constant_fold_lshl_add_reg0_immreg_reg
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_LSHL_ADD_U32 %0, %1, $vgpr0, implicit $exec
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_imm{{$}}
|
|
# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM
|
|
|
|
name: constant_fold_lshl_add_reg0_immreg_imm
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_LSHL_ADD_U32 %0, %1, 10, implicit $exec
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# GCN-LABEL: name: constant_fold_lshl_add_reg0_immreg_immreg{{$}}
|
|
# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM
|
|
|
|
name: constant_fold_lshl_add_reg0_immreg_immreg
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
|
|
%3:vgpr_32 = V_LSHL_ADD_U32 %0, %1, %2, implicit $exec
|
|
S_ENDPGM 0, implicit %3
|
|
|
|
...
|
|
|
|
---
|
|
# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_reg{{$}}
|
|
# GCN: %2:vgpr_32 = COPY $vgpr0, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM
|
|
|
|
name: constant_fold_and_or_reg0_immreg_reg
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_AND_OR_B32 %0, %1, $vgpr0, implicit $exec
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_imm{{$}}
|
|
# GCN: %2:vgpr_32 = V_MOV_B32_e32 10, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM
|
|
|
|
name: constant_fold_and_or_reg0_immreg_imm
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_AND_OR_B32 %0, %1, 10, implicit $exec
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
# GCN-LABEL: name: constant_fold_and_or_reg0_immreg_immreg{{$}}
|
|
# GCN: %3:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM
|
|
|
|
name: constant_fold_and_or_reg0_immreg_immreg
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
|
|
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_MOV_B32_e32 12345, implicit $exec
|
|
%3:vgpr_32 = V_AND_OR_B32 %0, %1, %2, implicit $exec
|
|
S_ENDPGM 0, implicit %3
|
|
|
|
...
|
|
|
|
# This used to incorrectly interpret V_MOV_B32_sdwa as being a move
|
|
# immediate, and interpreting the src0_modifiers field as a
|
|
# materialized immediate.
|
|
|
|
---
|
|
# GCN-LABEL: name: no_fold_sdwa_mov_imm
|
|
# GCN: %2:vgpr_32 = V_MOV_B32_sdwa 0, %0, 0, 5, 2, 4, implicit $exec, implicit %0(tied-def 0)
|
|
# GCN-NEXT: [[SHIFT:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, %2, implicit $exec
|
|
# GCN-NEXT: S_ENDPGM 0, implicit [[SHIFT]]
|
|
|
|
name: no_fold_sdwa_mov_imm
|
|
alignment: 0
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
%0:vgpr_32 = COPY $vgpr0
|
|
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%2:vgpr_32 = V_MOV_B32_sdwa 0, %0:vgpr_32, 0, 5, 2, 4, implicit $exec, implicit %0:vgpr_32(tied-def 0)
|
|
%3:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
|
|
%4:vgpr_32 = V_LSHRREV_B32_e64 %3:vgpr_32, %2:vgpr_32, implicit $exec
|
|
S_ENDPGM 0, implicit %4
|
|
|
|
...
|