forked from OSchip/llvm-project
77 lines
3.0 KiB
LLVM
77 lines
3.0 KiB
LLVM
; RUN: opt %loadPolly -polly-detect-unprofitable -disable-polly-intra-scop-scalar-to-array -polly-model-phi-nodes -polly-scops -analyze < %s | FileCheck %s
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;
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; Verify that both scalars (x and y) are properly written in the non-affine
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; region and read afterwards.
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;
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; void f(int *A, int b) {
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; for (int i = 0; i < 1024; i++) {
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; int x = 0, y = 0;
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; if ((x = 1 + A[i]))
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; y++;
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; A[i] = x + y;
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; }
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; }
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;
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; CHECK: Region: %bb1---%bb11
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; CHECK: Stmt_(bb2 => bb7)
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; CHECK: Domain :=
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; CHECK: { Stmt_(bb2 => bb7)[i0] : i0 >= 0 and i0 <= 1023 };
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; CHECK: Schedule :=
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; CHECK: { Stmt_(bb2 => bb7)[i0] -> [i0, 0] };
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: { Stmt_(bb2 => bb7)[i0] -> MemRef_A[i0] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: { Stmt_(bb2 => bb7)[i0] -> MemRef_x[] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: { Stmt_(bb2 => bb7)[i0] -> MemRef_y[] };
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; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: { Stmt_(bb2 => bb7)[i0] -> MemRef_y[] };
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; CHECK: Stmt_bb7
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; CHECK: Domain :=
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; CHECK: { Stmt_bb7[i0] : i0 >= 0 and i0 <= 1023 };
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; CHECK: Schedule :=
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; CHECK: { Stmt_bb7[i0] -> [i0, 1] };
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: { Stmt_bb7[i0] -> MemRef_x[] };
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK: { Stmt_bb7[i0] -> MemRef_y[] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: { Stmt_bb7[i0] -> MemRef_A[i0] };
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @f(i32* %A, i32 %b) {
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bb:
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br label %bb1
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bb1: ; preds = %bb10, %bb
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%indvars.iv = phi i64 [ %indvars.iv.next, %bb10 ], [ 0, %bb ]
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%exitcond = icmp ne i64 %indvars.iv, 1024
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br i1 %exitcond, label %bb2, label %bb11
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bb2: ; preds = %bb1
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%tmp = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%x = load i32, i32* %tmp, align 4
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%tmp4 = add nsw i32 %x, 1
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%tmp5 = icmp eq i32 %tmp4, 0
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br i1 %tmp5, label %bb7, label %bb6
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bb6: ; preds = %bb2
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br label %bb7
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bb7: ; preds = %bb2, %bb6
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%y = phi i32 [ 1, %bb6 ], [ 0, %bb2 ]
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%tmp4copy = add nsw i32 %x, 1
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%tmp8 = add nsw i32 %tmp4copy, %y
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%tmp9 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 %tmp8, i32* %tmp9, align 4
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br label %bb10
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bb10: ; preds = %bb7
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %bb1
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bb11: ; preds = %bb1
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ret void
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}
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