forked from OSchip/llvm-project
95 lines
4.3 KiB
LLVM
95 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; Test to make sure that a new block is inserted if we
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; have more than 2 predecessors for the block we're going to sink to.
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; RUN: opt -basic-aa -memdep -mldst-motion -S < %s | FileCheck %s --check-prefix=CHECK-NO
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; RUN: opt -debug-pass-manager -aa-pipeline=basic-aa -passes='require<memdep>,mldst-motion' -S < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-NO,CHECK-INV-NO
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; RUN: opt -debug-pass-manager -aa-pipeline=basic-aa -passes='require<memdep>,mldst-motion<split-footer-bb>' -S < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-YES,CHECK-INV-YES
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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; When passing split-footer-bb to MLSM, it invalidates CFG analyses
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; CHECK-INV-NO: Running pass: MergedLoadStoreMotionPass
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; CHECK-INV-NO-NOT: Invalidating analysis: DominatorTreeAnalysis
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; CHECK-INV-YES: Running pass: MergedLoadStoreMotionPass
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; CHECK-INV-YES: Invalidating analysis: DominatorTreeAnalysis
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; Function Attrs: nounwind uwtable
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define dso_local void @st_sink_split_bb(i32* nocapture %arg, i32* nocapture %arg1, i1 zeroext %arg2, i1 zeroext %arg3) local_unnamed_addr {
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; CHECK-NO-LABEL: @st_sink_split_bb(
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; CHECK-NO-NEXT: bb:
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; CHECK-NO-NEXT: br i1 [[ARG2:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
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; CHECK-NO: bb4:
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; CHECK-NO-NEXT: store i32 1, i32* [[ARG:%.*]], align 4
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; CHECK-NO-NEXT: br label [[BB9:%.*]]
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; CHECK-NO: bb5:
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; CHECK-NO-NEXT: br i1 [[ARG3:%.*]], label [[BB6:%.*]], label [[BB7:%.*]]
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; CHECK-NO: bb6:
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; CHECK-NO-NEXT: store i32 2, i32* [[ARG]], align 4
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; CHECK-NO-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ARG1:%.*]], i64 1
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; CHECK-NO-NEXT: store i32 3, i32* [[TMP1]], align 4
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; CHECK-NO-NEXT: [[TMP:%.*]] = getelementptr inbounds i32, i32* [[ARG1]], i64 2
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; CHECK-NO-NEXT: store i32 3, i32* [[TMP]], align 4
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; CHECK-NO-NEXT: br label [[BB9]]
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; CHECK-NO: bb7:
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; CHECK-NO-NEXT: store i32 3, i32* [[ARG]], align 4
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; CHECK-NO-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[ARG1]], i64 1
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; CHECK-NO-NEXT: store i32 3, i32* [[TMP2]], align 4
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; CHECK-NO-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[ARG1]], i64 2
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; CHECK-NO-NEXT: store i32 3, i32* [[TMP8]], align 4
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; CHECK-NO-NEXT: br label [[BB9]]
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; CHECK-NO: bb9:
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; CHECK-NO-NEXT: ret void
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;
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; CHECK-YES-LABEL: @st_sink_split_bb(
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; CHECK-YES-NEXT: bb:
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; CHECK-YES-NEXT: br i1 [[ARG2:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
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; CHECK-YES: bb4:
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; CHECK-YES-NEXT: store i32 1, i32* [[ARG:%.*]], align 4
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; CHECK-YES-NEXT: br label [[BB9:%.*]]
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; CHECK-YES: bb5:
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; CHECK-YES-NEXT: br i1 [[ARG3:%.*]], label [[BB6:%.*]], label [[BB7:%.*]]
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; CHECK-YES: bb6:
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; CHECK-YES-NEXT: store i32 2, i32* [[ARG]], align 4
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; CHECK-YES-NEXT: br label [[BB9_SINK_SPLIT:%.*]]
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; CHECK-YES: bb7:
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; CHECK-YES-NEXT: store i32 3, i32* [[ARG]], align 4
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; CHECK-YES-NEXT: br label [[BB9_SINK_SPLIT]]
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; CHECK-YES: bb9.sink.split:
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; CHECK-YES-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ARG1:%.*]], i64 1
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; CHECK-YES-NEXT: store i32 3, i32* [[TMP0]], align 4
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; CHECK-YES-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ARG1]], i64 2
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; CHECK-YES-NEXT: store i32 3, i32* [[TMP1]], align 4
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; CHECK-YES-NEXT: br label [[BB9]]
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; CHECK-YES: bb9:
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; CHECK-YES-NEXT: ret void
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;
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bb:
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br i1 %arg2, label %bb4, label %bb5
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bb4: ; preds = %bb
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store i32 1, i32* %arg, align 4
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br label %bb9
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bb5: ; preds = %bb
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br i1 %arg3, label %bb6, label %bb7
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bb6: ; preds = %bb5
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store i32 2, i32* %arg, align 4
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%tmp1 = getelementptr inbounds i32, i32* %arg1, i64 1
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store i32 3, i32* %tmp1, align 4
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%tmp = getelementptr inbounds i32, i32* %arg1, i64 2
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store i32 3, i32* %tmp, align 4
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br label %bb9
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bb7: ; preds = %bb5
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store i32 3, i32* %arg, align 4
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%tmp2 = getelementptr inbounds i32, i32* %arg1, i64 1
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store i32 3, i32* %tmp2, align 4
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%tmp8 = getelementptr inbounds i32, i32* %arg1, i64 2
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store i32 3, i32* %tmp8, align 4
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br label %bb9
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bb9: ; preds = %bb7, %bb6, %bb4
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ret void
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}
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