Jingyue Wu e7981cee24 [NVPTX] enable SpeculativeExecution in NVPTX ... Summary: SpeculativeExecution enables a series straight line optimizations (such as SLSR and NaryReassociate) on conditional code. For example, if (...) ... b * s ... if (...) ... (b + 1) * s ... speculative execution can hoist b * s and (b + 1) * s from then-blocks, so that we have ... b * s ... if (...) ... ... (b + 1) * s ... if (...) ... Then, SLSR can rewrite (b + 1) * s to (b * s + s) because after speculative execution b * s dominates (b + 1) * s. The performance impact of this change is significant. It speeds up the benchmarks running EigenFloatContractionKernelInternal16x16 (ba68f42fa6/unsupported/Eigen/CXX11/src/Tensor/TensorContractionCuda.h?at=default#cl-526) by roughly 2%. Some internal benchmarks that have the above code pattern are improved by up to 40%. No significant slowdowns are observed on Eigen CUDA microbenchmarks. Reviewers: jholewinski, broune, eliben Subscribers: llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11201 llvm-svn: 242437		2015-07-16 20:13:48 +00:00
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AMDGPU	[SLSR] S's basis must have the same type as S	2015-06-28 17:45:05 +00:00
NVPTX	[NVPTX] enable SpeculativeExecution in NVPTX	2015-07-16 20:13:48 +00:00
X86	[SLSR] garbage-collect unused instructions	2015-04-21 19:56:18 +00:00
slsr-add.ll	[SLSR] garbage-collect unused instructions	2015-04-21 19:56:18 +00:00
slsr-gep.ll	[SLSR] garbage-collect unused instructions	2015-04-21 19:56:18 +00:00
slsr-mul.ll	[SLSR] handle (B | i) * S	2015-05-15 17:07:48 +00:00