forked from OSchip/llvm-project
84 lines
2.8 KiB
LLVM
84 lines
2.8 KiB
LLVM
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after expand-isel-pseudos -o %t.mir %s
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; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s
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; Test that SIMachineFunctionInfo can be round trip serialized through
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; MIR.
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@lds = addrspace(3) global [512 x float] undef, align 4
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; CHECK-LABEL: {{^}}name: kernel
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; CHECK: machineFunctionInfo:
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; CHECK-NEXT: explicitKernArgSize: 128
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; CHECK-NEXT: maxKernArgAlign: 64
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; CHECK-NEXT: ldsSize: 2048
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; CHECK-NEXT: isEntryFunction: true
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; CHECK-NEXT: noSignedZerosFPMath: false
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; CHECK-NEXT: memoryBound: false
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; CHECK-NEXT: waveLimiter: false
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; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101'
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; CHECK-NEXT: frameOffsetReg: '$sgpr101'
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; CHECK-NEXT: stackPtrOffsetReg: '$sp_reg'
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; CHECK-NEXT: body:
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define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) {
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%gep = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %arg0
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store float 0.0, float addrspace(3)* %gep, align 4
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ret void
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}
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; CHECK-LABEL: {{^}}name: ps_shader
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; CHECK: machineFunctionInfo:
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; CHECK-NEXT: explicitKernArgSize: 0
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; CHECK-NEXT: maxKernArgAlign: 0
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; CHECK-NEXT: ldsSize: 0
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; CHECK-NEXT: isEntryFunction: true
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; CHECK-NEXT: noSignedZerosFPMath: false
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; CHECK-NEXT: memoryBound: false
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; CHECK-NEXT: waveLimiter: false
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; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr101'
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; CHECK-NEXT: frameOffsetReg: '$sgpr101'
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; CHECK-NEXT: stackPtrOffsetReg: '$sp_reg'
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; CHECK-NEXT: body:
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define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) {
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ret void
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}
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; CHECK-LABEL: {{^}}name: function
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; CHECK: machineFunctionInfo:
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; CHECK-NEXT: explicitKernArgSize: 0
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; CHECK-NEXT: maxKernArgAlign: 0
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; CHECK-NEXT: ldsSize: 0
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; CHECK-NEXT: isEntryFunction: false
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; CHECK-NEXT: noSignedZerosFPMath: false
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; CHECK-NEXT: memoryBound: false
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; CHECK-NEXT: waveLimiter: false
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; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr4'
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; CHECK-NEXT: frameOffsetReg: '$sgpr5'
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; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32'
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; CHECK-NEXT: body:
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define void @function() {
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ret void
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}
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; CHECK-LABEL: {{^}}name: function_nsz
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; CHECK: machineFunctionInfo:
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; CHECK-NEXT: explicitKernArgSize: 0
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; CHECK-NEXT: maxKernArgAlign: 0
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; CHECK-NEXT: ldsSize: 0
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; CHECK-NEXT: isEntryFunction: false
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; CHECK-NEXT: noSignedZerosFPMath: true
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; CHECK-NEXT: memoryBound: false
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; CHECK-NEXT: waveLimiter: false
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; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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; CHECK-NEXT: scratchWaveOffsetReg: '$sgpr4'
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; CHECK-NEXT: frameOffsetReg: '$sgpr5'
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; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32'
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; CHECK-NEXT: body:
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define void @function_nsz() #0 {
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ret void
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}
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attributes #0 = { "no-signed-zeros-fp-math" = "true" }
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