llvm-project/llvm/test/CodeGen/MIR
Fangrui Song e29e30b139 [llvm-readobj] Change -long-option to --long-option in tests. NFC
We use both -long-option and --long-option in tests. Switch to --long-option for consistency.

In the "llvm-readelf" mode, -long-option is discouraged as it conflicts with grouped short options and it is not accepted by GNU readelf.

While updating the tests, change llvm-readobj -s to llvm-readobj -S to reduce confusion ("s" is --section-headers in llvm-readobj but --symbols in llvm-readelf).

llvm-svn: 359649
2019-05-01 05:27:20 +00:00
..
AArch64 MIR: Validate LLT types when parsing 2019-02-04 22:59:56 +00:00
AMDGPU [AMDGPU] gfx1010 VMEM and SMEM implementation 2019-04-30 22:08:23 +00:00
ARM Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Generic [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL 2018-10-01 21:59:45 +00:00
Hexagon Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Mips Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
NVPTX [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
PowerPC [Power9] Allow gpr callee saved spills in prologue to vectors registers 2018-11-09 16:36:24 +00:00
WebAssembly [MIRParser][GlobalISel] Parsing vector pointer types (<M x pA>) 2018-05-08 02:02:50 +00:00
X86 [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
README

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.