forked from OSchip/llvm-project
217 lines
8.2 KiB
LLVM
217 lines
8.2 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -enable-misched=0 -post-RA-scheduler=0 -stress-regalloc=8 < %s | FileCheck %s
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; CHECK-LABEL: spill_v2i32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:24 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:28 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:24 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:28 ; 4-byte Folded Reload
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define void @spill_v2i32() {
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entry:
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%alloca = alloca <2 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <2 x i32>, <2 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <2 x i32>, <2 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <2 x i32>, <2 x i32> addrspace(5)* %alloca, i32 1
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store volatile <2 x i32> %a, <2 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v2f32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:24 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:28 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:24 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:28 ; 4-byte Folded Reload
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define void @spill_v2f32() {
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entry:
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%alloca = alloca <2 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <2 x i32>, <2 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <2 x i32>, <2 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <2 x i32>, <2 x i32> addrspace(5)* %alloca, i32 1
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store volatile <2 x i32> %a, <2 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v3i32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:48 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:52 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:56 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:48 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:52 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:56 ; 4-byte Folded Reload
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define void @spill_v3i32() {
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entry:
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%alloca = alloca <3 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <3 x i32>, <3 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <3 x i32>, <3 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <3 x i32>, <3 x i32> addrspace(5)* %alloca, i32 1
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store volatile <3 x i32> %a, <3 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v3f32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:48 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:52 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:56 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:48 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:52 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:56 ; 4-byte Folded Reload
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define void @spill_v3f32() {
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entry:
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%alloca = alloca <3 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <3 x i32>, <3 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <3 x i32>, <3 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <3 x i32>, <3 x i32> addrspace(5)* %alloca, i32 1
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store volatile <3 x i32> %a, <3 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v4i32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:48 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:52 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:56 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:60 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:48 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:52 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:56 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:60 ; 4-byte Folded Reload
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define void @spill_v4i32() {
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entry:
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%alloca = alloca <4 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <4 x i32>, <4 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <4 x i32>, <4 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <4 x i32>, <4 x i32> addrspace(5)* %alloca, i32 1
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store volatile <4 x i32> %a, <4 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v4f32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:48 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:52 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:56 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:60 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:48 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:52 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:56 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:60 ; 4-byte Folded Reload
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define void @spill_v4f32() {
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entry:
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%alloca = alloca <4 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <4 x i32>, <4 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <4 x i32>, <4 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <4 x i32>, <4 x i32> addrspace(5)* %alloca, i32 1
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store volatile <4 x i32> %a, <4 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v5i32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:96 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:100 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:104 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:108 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:96 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:100 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:104 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:108 ; 4-byte Folded Reload
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define void @spill_v5i32() {
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entry:
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%alloca = alloca <5 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <5 x i32>, <5 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <5 x i32>, <5 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <5 x i32>, <5 x i32> addrspace(5)* %alloca, i32 1
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store volatile <5 x i32> %a, <5 x i32> addrspace(5)* %outptr
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ret void
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}
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; CHECK-LABEL: spill_v5f32:
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:96 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:100 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:104 ; 4-byte Folded Spill
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; CHECK-DAG: buffer_store_dword v{{.*}} offset:108 ; 4-byte Folded Spill
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; CHECK: ;;#ASMSTART
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:96 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:100 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:104 ; 4-byte Folded Reload
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; CHECK-DAG: buffer_load_dword v{{.*}} offset:108 ; 4-byte Folded Reload
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define void @spill_v5f32() {
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entry:
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%alloca = alloca <5 x i32>, i32 2, align 4, addrspace(5)
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%aptr = getelementptr <5 x i32>, <5 x i32> addrspace(5)* %alloca, i32 1
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%a = load volatile <5 x i32>, <5 x i32> addrspace(5)* %aptr
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; Force %a to spill.
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call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7}" ()
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%outptr = getelementptr <5 x i32>, <5 x i32> addrspace(5)* %alloca, i32 1
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store volatile <5 x i32> %a, <5 x i32> addrspace(5)* %outptr
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ret void
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}
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