forked from OSchip/llvm-project
347 lines
11 KiB
YAML
347 lines
11 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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define void @test_load() { ret void }
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define void @test_store() { ret void }
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define void @store_4xi16(<4 x i16> %v, <4 x i16>* %ptr) {
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store <4 x i16> %v, <4 x i16>* %ptr
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ret void
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}
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define void @store_4xi32(<4 x i32> %v, <4 x i32>* %ptr) {
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store <4 x i32> %v, <4 x i32>* %ptr
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ret void
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}
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define void @store_8xi16(<8 x i16> %v, <8 x i16>* %ptr) {
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store <8 x i16> %v, <8 x i16>* %ptr
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ret void
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}
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define void @store_16xi8(<16 x i8> %v, <16 x i8>* %ptr) {
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store <16 x i8> %v, <16 x i8>* %ptr
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ret void
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}
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define <4 x i16> @load_4xi16(<4 x i16>* %ptr) {
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%res = load <4 x i16>, <4 x i16>* %ptr
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ret <4 x i16> %res
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}
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define <4 x i32> @load_4xi32(<4 x i32>* %ptr) {
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%res = load <4 x i32>, <4 x i32>* %ptr
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ret <4 x i32> %res
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}
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define <8 x i16> @load_8xi16(<8 x i16>* %ptr) {
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%res = load <8 x i16>, <8 x i16>* %ptr
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ret <8 x i16> %res
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}
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define <16 x i8> @load_16xi8(<16 x i8>* %ptr) {
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%res = load <16 x i8>, <16 x i8>* %ptr
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ret <16 x i8> %res
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}
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define <8 x i8> @load_8xi8(<8 x i8>* %ptr) {
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%res = load <8 x i8>, <8 x i8>* %ptr
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ret <8 x i8> %res
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}
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...
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---
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name: test_load
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: test_load
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load 1)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD]](s8)
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; CHECK: $w0 = COPY [[ANYEXT]](s32)
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; CHECK: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load 1)
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; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD1]](s8)
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; CHECK: $w0 = COPY [[ANYEXT1]](s32)
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; CHECK: [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[COPY]](p0) :: (load 2)
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; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD2]](s16)
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; CHECK: $w0 = COPY [[ANYEXT2]](s32)
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; CHECK: $w0 = COPY [[ANYEXT1]](s32)
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; CHECK: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8)
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; CHECK: $x0 = COPY [[LOAD3]](s64)
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; CHECK: [[LOAD4:%[0-9]+]]:_(p0) = G_LOAD [[COPY]](p0) :: (load 8)
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[LOAD4]](p0)
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; CHECK: $x0 = COPY [[PTRTOINT]](s64)
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; CHECK: [[LOAD5:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p0) :: (load 8)
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; CHECK: [[BITCAST:%[0-9]+]]:_(s64) = G_BITCAST [[LOAD5]](<2 x s32>)
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; CHECK: $x0 = COPY [[BITCAST]](s64)
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; CHECK: [[LOAD6:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load 8, align 16)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s64)
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; CHECK: [[LOAD7:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8)
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; CHECK: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[LOAD6]](s64), [[LOAD7]](s64)
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; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[MV]](s128)
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; CHECK: $x0 = COPY [[TRUNC]](s64)
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%0:_(p0) = COPY $x0
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%1:_(s1) = G_LOAD %0(p0) :: (load 1)
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%2:_(s32) = G_ANYEXT %1(s1)
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$w0 = COPY %2(s32)
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%3:_(s8) = G_LOAD %0(p0) :: (load 1)
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%4:_(s32) = G_ANYEXT %3(s8)
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$w0 = COPY %4(s32)
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%5:_(s16) = G_LOAD %0(p0) :: (load 2)
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%6:_(s32) = G_ANYEXT %5(s16)
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$w0 = COPY %6(s32)
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%7:_(s32) = G_LOAD %0(p0) :: (load 4)
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$w0 = COPY %4(s32)
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%8:_(s64) = G_LOAD %0(p0) :: (load 8)
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$x0 = COPY %8(s64)
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%9:_(p0) = G_LOAD %0(p0) :: (load 8)
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%10:_(s64) = G_PTRTOINT %9(p0)
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$x0 = COPY %10(s64)
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%11:_(<2 x s32>) = G_LOAD %0(p0) :: (load 8)
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%12:_(s64) = G_BITCAST %11(<2 x s32>)
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$x0 = COPY %12(s64)
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%13:_(s128) = G_LOAD %0(p0) :: (load 16)
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%14:_(s64) = G_TRUNC %13(s128)
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$x0 = COPY %14(s64)
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...
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---
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name: test_store
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: test_store
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY3]]
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; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[AND]](s32)
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; CHECK: G_STORE [[TRUNC]](s8), [[COPY]](p0) :: (store 1)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
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; CHECK: G_STORE [[TRUNC1]](s8), [[COPY]](p0) :: (store 1)
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
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; CHECK: G_STORE [[TRUNC2]](s16), [[COPY]](p0) :: (store 2)
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; CHECK: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store 4)
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
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; CHECK: G_STORE [[PTRTOINT]](s64), [[COPY]](p0) :: (store 8)
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; CHECK: G_STORE [[COPY]](p0), [[COPY]](p0) :: (store 8)
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; CHECK: [[PTRTOINT1:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
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; CHECK: G_STORE [[PTRTOINT1]](s64), [[COPY]](p0) :: (store 8, align 16)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C1]](s64)
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; CHECK: G_STORE [[PTRTOINT1]](s64), [[GEP]](p0) :: (store 8)
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%0:_(p0) = COPY $x0
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%1:_(s32) = COPY $w1
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%2:_(s1) = G_TRUNC %1(s32)
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G_STORE %2(s1), %0(p0) :: (store 1)
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%3:_(s8) = G_TRUNC %1(s32)
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G_STORE %3(s8), %0(p0) :: (store 1)
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%4:_(s16) = G_TRUNC %1(s32)
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G_STORE %4(s16), %0(p0) :: (store 2)
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G_STORE %1(s32), %0(p0) :: (store 4)
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%5:_(s64) = G_PTRTOINT %0(p0)
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G_STORE %5(s64), %0(p0) :: (store 8)
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G_STORE %0(p0), %0(p0) :: (store 8)
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%6:_(s64) = G_PTRTOINT %0(p0)
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%7:_(s128) = G_MERGE_VALUES %6(s64), %6
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G_STORE %7(s128), %0(p0) :: (store 16)
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...
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---
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name: store_4xi16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $d0, $x0
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; CHECK-LABEL: name: store_4xi16
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; CHECK: liveins: $d0, $x0
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: G_STORE [[COPY]](<4 x s16>), [[COPY1]](p0) :: (store 8 into %ir.ptr)
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; CHECK: RET_ReallyLR
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%0:_(<4 x s16>) = COPY $d0
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%1:_(p0) = COPY $x0
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G_STORE %0(<4 x s16>), %1(p0) :: (store 8 into %ir.ptr)
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RET_ReallyLR
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...
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---
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name: store_4xi32
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $q0, $x0
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; CHECK-LABEL: name: store_4xi32
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; CHECK: liveins: $q0, $x0
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: G_STORE [[COPY]](<4 x s32>), [[COPY1]](p0) :: (store 16 into %ir.ptr)
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; CHECK: RET_ReallyLR
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%0:_(<4 x s32>) = COPY $q0
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%1:_(p0) = COPY $x0
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G_STORE %0(<4 x s32>), %1(p0) :: (store 16 into %ir.ptr)
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RET_ReallyLR
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...
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---
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name: store_8xi16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $q0, $x0
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; CHECK-LABEL: name: store_8xi16
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; CHECK: liveins: $q0, $x0
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; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: G_STORE [[COPY]](<8 x s16>), [[COPY1]](p0) :: (store 16 into %ir.ptr)
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; CHECK: RET_ReallyLR
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%0:_(<8 x s16>) = COPY $q0
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%1:_(p0) = COPY $x0
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G_STORE %0(<8 x s16>), %1(p0) :: (store 16 into %ir.ptr)
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RET_ReallyLR
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...
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---
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name: store_16xi8
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $q0, $x0
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; CHECK-LABEL: name: store_16xi8
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; CHECK: liveins: $q0, $x0
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; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: G_STORE [[COPY]](<16 x s8>), [[COPY1]](p0) :: (store 16 into %ir.ptr)
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; CHECK: RET_ReallyLR
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%0:_(<16 x s8>) = COPY $q0
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%1:_(p0) = COPY $x0
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G_STORE %0(<16 x s8>), %1(p0) :: (store 16 into %ir.ptr)
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RET_ReallyLR
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...
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---
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name: load_4xi16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $x0
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; CHECK-LABEL: name: load_4xi16
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[LOAD:%[0-9]+]]:_(<4 x s16>) = G_LOAD [[COPY]](p0) :: (load 8 from %ir.ptr)
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; CHECK: $d0 = COPY [[LOAD]](<4 x s16>)
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; CHECK: RET_ReallyLR implicit $d0
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%0:_(p0) = COPY $x0
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%1:_(<4 x s16>) = G_LOAD %0(p0) :: (load 8 from %ir.ptr)
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$d0 = COPY %1(<4 x s16>)
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RET_ReallyLR implicit $d0
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...
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---
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name: load_4xi32
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $x0
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; CHECK-LABEL: name: load_4xi32
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.ptr)
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; CHECK: $q0 = COPY [[LOAD]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(p0) = COPY $x0
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%1:_(<4 x s32>) = G_LOAD %0(p0) :: (load 16 from %ir.ptr)
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$q0 = COPY %1(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: load_8xi16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $x0
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; CHECK-LABEL: name: load_8xi16
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[LOAD:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.ptr)
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; CHECK: $q0 = COPY [[LOAD]](<8 x s16>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(p0) = COPY $x0
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%1:_(<8 x s16>) = G_LOAD %0(p0) :: (load 16 from %ir.ptr)
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$q0 = COPY %1(<8 x s16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: load_16xi8
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $x0
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; CHECK-LABEL: name: load_16xi8
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[LOAD:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.ptr)
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; CHECK: $q0 = COPY [[LOAD]](<16 x s8>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(p0) = COPY $x0
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%1:_(<16 x s8>) = G_LOAD %0(p0) :: (load 16 from %ir.ptr)
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$q0 = COPY %1(<16 x s8>)
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RET_ReallyLR implicit $q0
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...
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---
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name: load_8xi8
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.1 (%ir-block.0):
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liveins: $x0
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; CHECK-LABEL: name: load_8xi8
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[LOAD:%[0-9]+]]:_(<8 x s8>) = G_LOAD [[COPY]](p0) :: (load 8 from %ir.ptr)
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; CHECK: $d0 = COPY [[LOAD]](<8 x s8>)
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; CHECK: RET_ReallyLR implicit $d0
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%0:_(p0) = COPY $x0
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%1:_(<8 x s8>) = G_LOAD %0(p0) :: (load 8 from %ir.ptr)
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$d0 = COPY %1(<8 x s8>)
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RET_ReallyLR implicit $d0
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...
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