forked from OSchip/llvm-project
33 lines
1.1 KiB
TableGen
33 lines
1.1 KiB
TableGen
//===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// V4 Machine Info +
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//===----------------------------------------------------------------------===//
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include "HexagonScheduleV4.td"
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// V55 Machine Info +
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include "HexagonScheduleV55.td"
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//===----------------------------------------------------------------------===//
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// V60 Machine Info -
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//===----------------------------------------------------------------------===//
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include "HexagonScheduleV60.td"
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include "HexagonIICScalar.td"
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include "HexagonIICHVX.td"
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//===----------------------------------------------------------------------===//
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// V62 Machine Info +
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//===----------------------------------------------------------------------===//
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include "HexagonScheduleV62.td"
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