forked from OSchip/llvm-project
105 lines
3.3 KiB
LLVM
105 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefix=X64
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define void @test_movntss(i8* %p, <4 x float> %a) nounwind optsize ssp {
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; X32-LABEL: test_movntss:
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movntss %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: test_movntss:
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; X64: # BB#0:
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; X64-NEXT: movntss %xmm0, (%rdi)
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; X64-NEXT: retq
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tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
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ret void
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}
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declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
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define void @test_movntsd(i8* %p, <2 x double> %a) nounwind optsize ssp {
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; X32-LABEL: test_movntsd:
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movntsd %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: test_movntsd:
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; X64: # BB#0:
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; X64-NEXT: movntsd %xmm0, (%rdi)
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; X64-NEXT: retq
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tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
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ret void
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}
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declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
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define <2 x i64> @test_extrqi(<2 x i64> %x) nounwind uwtable ssp {
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; X32-LABEL: test_extrqi:
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; X32: # BB#0:
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; X32-NEXT: extrq $2, $3, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_extrqi:
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; X64: # BB#0:
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; X64-NEXT: extrq $2, $3, %xmm0
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; X64-NEXT: retq
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%1 = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)
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ret <2 x i64> %1
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}
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declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind
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define <2 x i64> @test_extrq(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
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; X32-LABEL: test_extrq:
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; X32: # BB#0:
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; X32-NEXT: extrq %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_extrq:
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; X64: # BB#0:
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; X64-NEXT: extrq %xmm1, %xmm0
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; X64-NEXT: retq
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%1 = bitcast <2 x i64> %y to <16 x i8>
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%2 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %1) nounwind
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ret <2 x i64> %2
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}
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declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind
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define <2 x i64> @test_insertqi(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
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; X32-LABEL: test_insertqi:
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; X32: # BB#0:
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; X32-NEXT: insertq $6, $5, %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_insertqi:
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; X64: # BB#0:
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; X64-NEXT: insertq $6, $5, %xmm1, %xmm0
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; X64-NEXT: retq
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%1 = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6)
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ret <2 x i64> %1
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}
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declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind
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define <2 x i64> @test_insertq(<2 x i64> %x, <2 x i64> %y) nounwind uwtable ssp {
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; X32-LABEL: test_insertq:
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; X32: # BB#0:
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; X32-NEXT: insertq %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_insertq:
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; X64: # BB#0:
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; X64-NEXT: insertq %xmm1, %xmm0
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; X64-NEXT: retq
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%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
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ret <2 x i64> %1
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}
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declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind
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