forked from OSchip/llvm-project
326 lines
8.6 KiB
LLVM
326 lines
8.6 KiB
LLVM
; RUN: llc -march=mipsel -relocation-model=pic \
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; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32
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; RUN: llc -march=mipsel -relocation-model=static \
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; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
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; RUN: llc -march=mips64el -mcpu=mips64r2 -relocation-model=pic \
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; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC64
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; RUN: llc -march=mips64el -mcpu=mips64r2 -relocation-model=static \
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; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC64
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; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic \
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; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | \
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; RUN: FileCheck %s -check-prefixes=ALL,PIC16
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; RUN: llc -march=mipsel -relocation-model=pic -mattr=+micromips -mips-tail-calls=1 < %s | \
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; RUN: FileCheck %s -check-prefixes=ALL,PIC32MM
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; RUN: llc -march=mipsel -relocation-model=static -mattr=+micromips \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
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; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mips-tail-calls=1 < %s | \
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; RUN: FileCheck %s -check-prefixes=ALL,PIC32R6
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; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r2 \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
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; RUN: llc -march=mips64el -relocation-model=pic -mcpu=mips64r2 \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=PIC64
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; RUN: llc -march=mips64el -relocation-model=pic -mcpu=mips64r6 \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC64
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; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mattr=+micromips \
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; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32MM
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; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
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; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32MMR6
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@g0 = common global i32 0, align 4
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@g1 = common global i32 0, align 4
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@g2 = common global i32 0, align 4
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@g3 = common global i32 0, align 4
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@g4 = common global i32 0, align 4
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@g5 = common global i32 0, align 4
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@g6 = common global i32 0, align 4
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@g7 = common global i32 0, align 4
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@g8 = common global i32 0, align 4
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@g9 = common global i32 0, align 4
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define i32 @caller1(i32 %a0) nounwind {
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entry:
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; ALL-LABEL: caller1:
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; PIC32: jalr $25
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; PIC32MM: jalr $25
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; PIC32R6: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; N64: jalr $25
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; N64R6: jalr $25
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; PIC16: jalrc
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%call = tail call i32 @callee1(i32 1, i32 1, i32 1, i32 %a0) nounwind
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ret i32 %call
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}
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declare i32 @callee1(i32, i32, i32, i32)
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define i32 @caller2(i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
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entry:
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; ALL-LABEL: caller2
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; PIC32: jalr $25
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; PIC32MM: jalr $25
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; PIC32R6: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; N64: jalr $25
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; N64R6: jalr $25
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; PIC16: jalrc
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%call = tail call i32 @callee2(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind
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ret i32 %call
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}
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declare i32 @callee2(i32, i32, i32, i32, i32)
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define i32 @caller3(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind {
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entry:
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; ALL-LABEL: caller3:
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; PIC32: jalr $25
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; PIC32R6: jalr $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; N64: jalr $25
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; N64R6: jalr $25
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; PIC16: jalrc
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%call = tail call i32 @callee3(i32 1, i32 1, i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind
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ret i32 %call
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}
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declare i32 @callee3(i32, i32, i32, i32, i32, i32, i32, i32)
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define i32 @caller4(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {
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entry:
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; ALL-LABEL: caller4:
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; PIC32: jalr $25
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; PIC32R6: jalr $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; SATATIC32MMR6: jal
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; PIC64: jalr $25
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; STATIC64: jal
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; N64R6: jalr $25
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; PIC16: jalrc
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%call = tail call i32 @callee4(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
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ret i32 %call
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}
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declare i32 @callee4(i32, i32, i32, i32, i32, i32, i32, i32, i32)
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define i32 @caller5() nounwind readonly {
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entry:
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; ALL-LABEL: caller5:
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; PIC32: jr $25
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; PIC32R6: jr $25
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; PIC32MM: jr
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; STATIC32: j
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; STATIC32MMR6: bc
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; PIC64: jr $25
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; STATIC64: j
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; PIC16: jalrc
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%0 = load i32, i32* @g0, align 4
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%1 = load i32, i32* @g1, align 4
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%2 = load i32, i32* @g2, align 4
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%3 = load i32, i32* @g3, align 4
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%4 = load i32, i32* @g4, align 4
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%5 = load i32, i32* @g5, align 4
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%6 = load i32, i32* @g6, align 4
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%7 = load i32, i32* @g7, align 4
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%8 = load i32, i32* @g8, align 4
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%9 = load i32, i32* @g9, align 4
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%call = tail call fastcc i32 @callee5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9)
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ret i32 %call
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}
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define internal fastcc i32 @callee5(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9) nounwind readnone noinline {
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entry:
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%add = add nsw i32 %a1, %a0
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%add1 = add nsw i32 %add, %a2
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%add2 = add nsw i32 %add1, %a3
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%add3 = add nsw i32 %add2, %a4
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%add4 = add nsw i32 %add3, %a5
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%add5 = add nsw i32 %add4, %a6
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%add6 = add nsw i32 %add5, %a7
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%add7 = add nsw i32 %add6, %a8
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%add8 = add nsw i32 %add7, %a9
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ret i32 %add8
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}
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declare i32 @callee8(i32, ...)
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define i32 @caller8_0() nounwind {
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entry:
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; ALL-LABEL: caller8_0:
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; PIC32: jr $25
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; PIC32R6: jrc $25
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; PIC32MM: jrc
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; STATIC32: j
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; STATIC32MMR6: bc
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; PIC64: jr $25
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; PIC64R6: jrc $25
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; STATIC64: j
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; PIC16: jalrc
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%call = tail call fastcc i32 @caller8_1()
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ret i32 %call
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}
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define internal fastcc i32 @caller8_1() nounwind noinline {
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entry:
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; ALL-LABEL: caller8_1:
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; PIC32: jalr $25
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; PIC32R6: jalr $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; PIC64: jalr $25
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; STATIC64: jal
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; PIC16: jalrc
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%call = tail call i32 (i32, ...) @callee8(i32 2, i32 1) nounwind
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ret i32 %call
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}
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%struct.S = type { [2 x i32] }
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@gs1 = external global %struct.S
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declare i32 @callee9(%struct.S* byval)
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define i32 @caller9_0() nounwind {
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entry:
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; ALL-LABEL: caller9_0:
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; PIC32: jr $25
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; PIC32R6: jrc $25
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; PIC32MM: jrc
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; STATIC32: j
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; STATIC32MMR6: bc
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; PIC64: jr $25
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; STATIC64: j
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; PIC64R6: jrc $25
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; PIC16: jalrc
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%call = tail call fastcc i32 @caller9_1()
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ret i32 %call
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}
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define internal fastcc i32 @caller9_1() nounwind noinline {
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entry:
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; ALL-LABEL: caller9_1:
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; PIC32: jalr $25
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; PIC32R6: jalrc $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; STATIC64: jal
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; PIC64: jalr $25
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; PIC64R6: jalrc $25
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; PIC16: jalrc
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%call = tail call i32 @callee9(%struct.S* byval @gs1) nounwind
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ret i32 %call
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}
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declare i32 @callee10(i32, i32, i32, i32, i32, i32, i32, i32, i32)
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define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind {
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entry:
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; ALL-LABEL: caller10:
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; PIC32: jalr $25
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; PIC32R6: jalr $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; STATIC64: jal
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; PIC64: jalr $25
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; PIC64R6: jalr $25
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; PIC16: jalrc
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%call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
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ret i32 %call
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}
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declare i32 @callee11(%struct.S* byval)
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define i32 @caller11() nounwind noinline {
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entry:
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; ALL-LABEL: caller11:
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; PIC32: jalr $25
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; PIC32R6: jalrc $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; STATIC64: jal
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; PIC64: jalr $25
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; PIC64R6: jalrc $25
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; PIC16: jalrc
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%call = tail call i32 @callee11(%struct.S* byval @gs1) nounwind
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ret i32 %call
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}
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declare i32 @callee12()
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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define i32 @caller12(%struct.S* nocapture byval %a0) nounwind {
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entry:
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; ALL-LABEL: caller12:
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; PIC32: jalr $25
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; PIC32R6: jalrc $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; STATIC64: jal
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; PIC64: jalr $25
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; PIC64R6: jalrc $25
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; PIC16: jalrc
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%0 = bitcast %struct.S* %a0 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast (%struct.S* @gs1 to i8*), i8* %0, i32 8, i32 4, i1 false)
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%call = tail call i32 @callee12() nounwind
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ret i32 %call
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}
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declare i32 @callee13(i32, ...)
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define i32 @caller13() nounwind {
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entry:
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; ALL-LABEL: caller13:
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; PIC32: jalr $25
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; PIC32R6: jalr $25
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; PIC32MM: jalr $25
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; STATIC32: jal
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; STATIC32MMR6: jal
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; STATIC64: jal
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; PIC64R6: jalr $25
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; PIC64: jalr $25
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; PIC16: jalrc
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%call = tail call i32 (i32, ...) @callee13(i32 1, i32 2) nounwind
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ret i32 %call
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}
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; Check that there is a chain edge between the load and store nodes.
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;
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; ALL-LABEL: caller14:
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; PIC32: lw ${{[0-9]+}}, 48($sp)
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; PIC32: sw $4, 16($sp)
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; PIC32MM: lw ${{[0-9]+}}, 48($sp)
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; PIC32MM: sw16 $4, 16(${{[0-9]+}})
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define void @caller14(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
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entry:
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tail call void @callee14(i32 %e, i32 %b, i32 %c, i32 %d, i32 %a)
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ret void
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}
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declare void @callee14(i32, i32, i32, i32, i32)
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