forked from OSchip/llvm-project
31 lines
1.3 KiB
LLVM
31 lines
1.3 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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;
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; Check that the stack is aligned according to the outgoing function arguments.
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; CHECK: r29 = and(r29,#-128)
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target triple = "hexagon-unknown--elf"
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@.str = private unnamed_addr constant [32 x i8] c"\0AMixed Vectors, Pairs, int flt\0A\00", align 1
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@.str.1 = private unnamed_addr constant [11 x i8] c"\0AVar args\0A\00", align 1
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@gVec0 = common global <16 x i32> zeroinitializer, align 64
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@gVec10 = common global <32 x i32> zeroinitializer, align 128
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@gi1 = common global i32 0, align 4
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@gf1 = common global float 0.000000e+00, align 4
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define i32 @main() #0 {
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b0:
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%v1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i32 0, i32 0)) #0
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%v2 = load <16 x i32>, <16 x i32>* @gVec0, align 64
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%v3 = load <32 x i32>, <32 x i32>* @gVec10, align 128
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%v4 = load i32, i32* @gi1, align 4
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%v5 = load float, float* @gf1, align 4
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%v6 = fpext float %v5 to double
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call void (i8*, i32, ...) @VarVec1(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i32 0, i32 0), i32 4, <16 x i32> %v2, <32 x i32> %v3, i32 %v4, double %v6)
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ret i32 0
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}
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declare i32 @printf(i8*, ...) #0
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declare void @VarVec1(i8*, i32, ...) #0
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attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx" }
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