llvm-project/llvm/test/CodeGen/Thumb
Sjoerd Meijer 96e10b5a9e [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
This is essentially a recommit of r285893, but with a correctness fix. The
problem of the original commit was that this:

bic r5, r7, #31
cbz r5, .LBB2_10

got rewritten into:

lsrs  r5, r7, #5
beq .LBB2_10

The result in destination register r5 is not the same and this is incorrect
when r5 is not dead. So this fix includes checking the uses of the AND
destination register. And also, compared to the original commit, some regression
tests didn't need changing anymore because of this extra check.

For completeness, this was the original commit message:

For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more
efficient instruction selection if the bitmask is one consecutive sequence of
set bits (32 - clz(bm) - ctz(bm) == popcount(bm)).

1) If the bitmask touches the LSB, then we can remove all the upper bits and
set the flags by doing one LSLS.
2) If the bitmask touches the MSB, then we can remove all the lower bits and
set the flags with one LSRS.
3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit
into the sign bit with one LSLS and change the condition query from NE/EQ to
MI/PL (we could also implement this by shifting into the carry bit and
branching on BCC/BCS).
4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower
zero bits of the mask.

1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two
16-bit instructions but can elide the CMP and doesn't require materializing a
complex immediate, so is also a win.

Differential Revision: https://reviews.llvm.org/D27761

llvm-svn: 289794
2016-12-15 09:38:59 +00:00
..
2007-01-31-RegInfoAssert.ll
2007-02-02-JoinIntervalsCrash.ll
2007-05-05-InvalidPushPop.ll
2009-06-18-ThumbCommuteMul.ll
2009-07-20-TwoAddrBug.ll
2009-07-27-PEIAssert.ll
2009-08-12-ConstIslandAssert.ll
2009-08-12-RegInfoAssert.ll
2009-08-20-ISelBug.ll
2009-12-17-pre-regalloc-taildup.ll
2010-06-18-SibCallCrash.ll
2010-07-01-FuncAlign.ll [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00
2010-07-15-debugOrdering.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
2011-05-11-DAGLegalizer.ll Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
2011-06-16-NoGPRs.ll
2011-EpilogueBug.ll
2012-04-26-M0ISelBug.ll
2014-06-10-thumb1-ldst-opt-bug.ll
DbgValueOtherTargets.test
PR17309.ll
and_neg.ll Add a regression test for PR28348. 2016-06-29 17:34:31 +00:00
asmprinter-bug.ll
barrier.ll ARM: stop emitting blx instructions for most calls on MachO. 2016-05-10 19:17:47 +00:00
bic_imm.ll [Thumb] Reapply r272251 with a fix for PR28348 (mk 2) 2016-07-05 12:37:13 +00:00
callee_save.ll Re-land "[Thumb] Save/restore high registers in Thumb1 pro/epilogues" 2016-10-11 21:14:03 +00:00
cmp-add-fold.ll [Thumb] Select (CMPZ X, -C) -> (CMPZ (ADDS X, C), 0) 2016-09-09 12:52:24 +00:00
cmp-fold.ll [Thumb1] Teach optimizeCompareInstr about thumb1 compares 2016-09-09 09:51:06 +00:00
constants.ll [Thumb] Fix off-by-one error in r272007 2016-06-14 13:33:07 +00:00
copy_thumb.ll
cortex-m0-unaligned-access.ll [ARM] Define subtarget feature strict-align. 2015-07-28 22:44:28 +00:00
dyn-stackalloc.ll Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
fastcc.ll
fpconv.ll
fpow.ll
frame_thumb.ll
iabs.ll
inlineasm-imm-thumb.ll
inlineasm-thumb.ll
ispositive.ll
large-stack.ll Re-land "[Thumb] Save/restore high registers in Thumb1 pro/epilogues" 2016-10-11 21:14:03 +00:00
ldm-merge-call.ll
ldm-merge-struct.ll Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
ldm-stm-base-materialization-thumb2.ll [ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM. 2015-10-05 14:49:54 +00:00
ldm-stm-base-materialization.ll Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
ldm-stm-postinc.ll [Thumb-1] Select post-increment load and store where possible 2016-07-15 08:03:56 +00:00
ldr_ext.ll
ldr_frame.ll
lit.local.cfg
long-setcc.ll
long.ll
long_shift.ll
mature-mc-support.ll
mul.ll
pop.ll [ARM] Refactor the prologue/epilogue emission to be more robust. 2015-07-20 21:42:14 +00:00
push.ll [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
rev.ll
segmented-stacks-dynamic.ll
segmented-stacks.ll [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00
select.ll
sjljehprepare-lower-vector.ll
stack-access.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
stack-coloring-without-frame-ptr.ll Revert "Change memcpy/memset/memmove to have dest and source alignments." 2015-11-19 05:56:52 +00:00
stack-frame.ll
stack_guard_remat.ll
stm-merge.ll
thumb-imm.ll
thumb-ldm.ll
thumb-shrink-wrapping.ll [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently 2016-12-15 09:38:59 +00:00
trap.ll
triple.ll
tst_teq.ll
unord.ll
vargs.ll [ARM] Refactor the prologue/epilogue emission to be more robust. 2015-07-20 21:42:14 +00:00