forked from OSchip/llvm-project
39 lines
1.6 KiB
LLVM
39 lines
1.6 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; GCN-LABEL: {{^}}reduce_i64_load_align_4_width_to_i32:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]]
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; GCN: v_and_b32_e32 v{{[0-9]+}}, 0x12d687, [[VAL]]
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; GCN: buffer_store_dwordx2
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define void @reduce_i64_load_align_4_width_to_i32(i64 addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
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%a = load i64, i64 addrspace(1)* %in, align 4
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%and = and i64 %a, 1234567
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store i64 %and, i64 addrspace(1)* %out, align 8
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ret void
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}
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; GCN-LABEL: {{^}}reduce_i64_align_4_bitcast_v2i32_elt0:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]]
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; GCN: buffer_store_dword [[VAL]]
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define void @reduce_i64_align_4_bitcast_v2i32_elt0(i32 addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
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%a = load i64, i64 addrspace(1)* %in, align 4
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%vec = bitcast i64 %a to <2 x i32>
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%elt0 = extractelement <2 x i32> %vec, i32 0
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store i32 %elt0, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}reduce_i64_align_4_bitcast_v2i32_elt1:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:4
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; GCN: buffer_store_dword [[VAL]]
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define void @reduce_i64_align_4_bitcast_v2i32_elt1(i32 addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
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%a = load i64, i64 addrspace(1)* %in, align 4
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%vec = bitcast i64 %a to <2 x i32>
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%elt0 = extractelement <2 x i32> %vec, i32 1
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store i32 %elt0, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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