forked from OSchip/llvm-project
44 lines
1.4 KiB
LLVM
44 lines
1.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=medium <%s | FileCheck -check-prefix=MEDIUM %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -O0 -code-model=large <%s | FileCheck -check-prefix=LARGE %s
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; Test correct code generation for medium and large code model
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; for loading and storing a file-scope static variable.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@gi = global i32 5, align 4
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define signext i32 @test_file_static() nounwind {
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entry:
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%0 = load i32, i32* @gi, align 4
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%inc = add nsw i32 %0, 1
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store i32 %inc, i32* @gi, align 4
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ret i32 %0
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}
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; MEDIUM-LABEL: test_file_static:
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; MEDIUM: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; MEDIUM: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
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; MEDIUM: lwz {{[0-9]+}}, 0([[REG2]])
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; MEDIUM: stw {{[0-9]+}}, 0([[REG2]])
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; MEDIUM: .type [[VAR]],@object
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; MEDIUM: .data
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; MEDIUM: .globl [[VAR]]
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; MEDIUM: [[VAR]]:
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; MEDIUM: .long 5
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; LARGE-LABEL: test_file_static:
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; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; LARGE: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
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; LARGE: lwz {{[0-9]+}}, 0([[REG2]])
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; LARGE: stw {{[0-9]+}}, 0([[REG2]])
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; LARGE: [[VAR]]:
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; LARGE: .tc [[VAR2:[a-z0-9A-Z_.]+]][TC],[[VAR2]]
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; LARGE: .type [[VAR2]],@object
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; LARGE: .data
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; LARGE: .globl [[VAR2]]
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; LARGE: [[VAR2]]:
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; LARGE: .long 5
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