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AArch64
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[AArch64][SVE] Implement SPLAT_VECTOR for i1 vectors.
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2019-12-09 15:09:33 -08:00 |
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AMDGPU
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[MBP] Avoid tail duplication if it can't bring benefit
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2019-12-06 09:53:53 -08:00 |
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ARC
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…
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ARM
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[PGO][PGSO] Instrument the code gen / target passes.
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2019-12-09 12:42:59 -08:00 |
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AVR
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…
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BPF
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[BPF] Support weak global variables for BTF
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2019-12-07 08:58:19 -08:00 |
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Generic
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[CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2
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2019-11-02 23:59:12 -04:00 |
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Hexagon
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[ModuloSchedule] Fix a bug in experimental expander
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2019-11-23 16:01:47 -08:00 |
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Inputs
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…
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Lanai
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…
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MIR
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[llvm] Fixing MIRVRegNamerUtils to properly handle 2+ MachineBasicBlocks.
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2019-12-04 18:36:08 -05:00 |
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MSP430
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[TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4)
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2019-11-13 09:23:08 +01:00 |
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Mips
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Handle BUNDLE instructions in MipsAsmPrinter
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2019-12-04 11:30:00 +00:00 |
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NVPTX
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[NVPTX] Added llvm.nvvm.mma.m8n8k4.* intrinsics
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2019-10-28 13:55:30 -07:00 |
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PowerPC
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[PowerPC][NFC] Rename ANDI(S)o8 to ANDI(S)8o
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2019-12-09 19:21:34 +00:00 |
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RISCV
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[RISCV] Fix mir-target-flags.ll
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2019-12-09 13:51:08 +00:00 |
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SPARC
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Temporarily run machine-verifier once in test/CodeGen/SPARC/fp128.ll, so that
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2019-12-03 11:21:52 +01:00 |
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SystemZ
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[FPEnv] Constrained FCmp intrinsics
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2019-12-07 11:28:39 +01:00 |
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Thumb
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Revert "ARM-Darwin: keep the frame register reserved even if not updated."
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2019-12-06 10:59:26 -08:00 |
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Thumb2
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Revert "[ARM][MVE] Add intrinsics for immediate shifts."
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2019-12-09 16:47:38 -08:00 |
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WebAssembly
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[WebAssembly] Fix miscompile of select with and
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2019-11-15 16:22:01 -08:00 |
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WinCFGuard
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[WinCFG] Handle constant casts carefully in .gfids emission
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2019-11-01 13:32:03 -07:00 |
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WinEH
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X86
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[Codegen][X86] Modernize/regenerate old tests. NFCI.
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2019-12-10 00:27:46 +01:00 |
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XCore
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