forked from OSchip/llvm-project
ec5d779eb8
LLVM currently treats the first operand of MVCK as if it were a regular base+index+displacement address. However, it is in fact a base+displacement combined with a length register field. While the two might look syntactically similar, there are two semantic differences: - %r0 is a valid length register, even though it cannot be used as an index register. - In an expression with just a single register like 0(%rX), the register is treated as base with normal addresses, while it is treated as the length register (with an empty base) for MVCK. Fixed by adding a new operand parser class BDRAddr and reworking the assembler parser to distinguish between address + length register operands and regular addresses. llvm-svn: 285574 |
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| .. | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| SystemZMCAsmBackend.cpp | ||
| SystemZMCAsmInfo.cpp | ||
| SystemZMCAsmInfo.h | ||
| SystemZMCCodeEmitter.cpp | ||
| SystemZMCFixups.h | ||
| SystemZMCObjectWriter.cpp | ||
| SystemZMCTargetDesc.cpp | ||
| SystemZMCTargetDesc.h | ||