..
AArch64
[AArch64] Add support for secrel add/load/store relocations for COFF
2018-03-01 20:42:28 +00:00
AMDGPU
[AMDGPU][MC] Added lds support for MUBUF instructions
2018-02-21 13:13:48 +00:00
ARM
[ARM][Asm] VMOVSRR and VMOVRRS need sequential S registers
2018-03-05 13:27:26 +00:00
AVR
[AVR] Implement some missing code paths
2017-12-11 11:01:27 +00:00
AsmParser
[DebugInfo] Remove target-specific instructions in test
2018-02-26 21:21:19 +00:00
BPF
bpf: New disassembler testcases for 32-bit subregister support
2018-02-23 23:49:35 +00:00
COFF
[CodeView] Add line numbers for inlined call sites
2018-01-18 22:55:43 +00:00
Disassembler
[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.
2018-02-23 15:55:16 +00:00
ELF
[DebugInfo] Add remaining files to r325970
2018-02-23 23:13:18 +00:00
Hexagon
[Hexagon] Add trap1 instruction
2018-03-01 21:54:08 +00:00
Lanai
[lanai] Add more tests for assembly of conditional ALU ops
2016-07-11 17:58:16 +00:00
MachO
[DebugInfo] Support DWARF v5 source code embedding extension
2018-02-23 23:01:06 +00:00
Markup
…
Mips
[mips] Correct the definition of cvt.d.w
2018-02-20 15:55:17 +00:00
PowerPC
[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.
2018-02-23 15:55:16 +00:00
RISCV
[RISCV] Implement MC relaxations for compressed instructions.
2018-03-02 22:04:12 +00:00
Sparc
[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
2017-07-25 15:28:28 +00:00
SystemZ
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
2017-07-18 09:17:00 +00:00
WebAssembly
[WebAssembly] Avoid cast ExprType to wasm::ValType
2018-03-02 21:33:14 +00:00
X86
[X86] Add assembler/disassembler support for blendm with zero masking and broacast.
2018-02-23 20:48:44 +00:00