forked from OSchip/llvm-project
00dcc0f53c
Added support for bytes replication feature, so it could be GAS compatible. E.g. instructions below: "vmov.i32 d0, 0xffffffff" "vmvn.i32 d0, 0xabababab" "vmov.i32 d0, 0xabababab" "vmov.i16 d0, 0xabab" are incorrect, but we could deal with such cases. For first one we should emit: "vmov.i8 d0, 0xff" For second one ("vmvn"): "vmov.i8 d0, 0x54" For last two instructions it should emit: "vmov.i8 d0, 0xab" P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code. Just for keeping method bodies in harmony with themselves. llvm-svn: 207080 |
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AArch64 | ||
ARM | ||
ARM64 | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
MachO | ||
Markup | ||
Mips | ||
PowerPC | ||
Sparc | ||
SystemZ | ||
X86 |