forked from OSchip/llvm-project
26 lines
1.9 KiB
LLVM
26 lines
1.9 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; Check that this compiles successfully.
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; CHECK: vunpack
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon"
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define void @fred() #0 {
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b0:
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%v1 = load <64 x i8>, <64 x i8>* undef, align 1
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%v2 = sext <64 x i8> %v1 to <64 x i32>
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%v3 = load <64 x i8>, <64 x i8>* null, align 1
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%v4 = sext <64 x i8> %v3 to <64 x i32>
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%v5 = mul nsw <64 x i32> %v4, %v2
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%v6 = add nsw <64 x i32> %v5, zeroinitializer
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%v7 = shl <64 x i32> %v6, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
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%v8 = ashr exact <64 x i32> %v7, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
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%v9 = mul nsw <64 x i32> %v8, %v8
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%v10 = trunc <64 x i32> %v9 to <64 x i8>
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store <64 x i8> %v10, <64 x i8>* undef, align 1
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unreachable
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
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