forked from OSchip/llvm-project
46 lines
1.5 KiB
LLVM
46 lines
1.5 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK-LABEL: test_00
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; CHECK: [[R00:r[0-9]+]] = ##16843009
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; CHECK: [[V00:v[0-9]+]] = vsplat([[R00]])
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; CHECK: v0 = vdelta(v0,[[V00]])
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define <32 x i16> @test_00(<32 x i16> %a0) #0 {
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%v0 = call <32 x i16> @llvm.bswap.v32i16(<32 x i16> %a0)
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ret <32 x i16> %v0
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}
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; CHECK-LABEL: test_01
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; CHECK: [[R01:r[0-9]+]] = ##50529027
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; CHECK: [[V01:v[0-9]+]] = vsplat([[R01]])
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; CHECK: v0 = vdelta(v0,[[V01]])
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define <16 x i32> @test_01(<16 x i32> %a0) #0 {
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%v0 = call <16 x i32> @llvm.bswap.v16i32(<16 x i32> %a0)
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ret <16 x i32> %v0
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}
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; CHECK-LABEL: test_10
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; CHECK: [[R10:r[0-9]+]] = ##16843009
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; CHECK: [[V10:v[0-9]+]] = vsplat([[R10]])
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; CHECK: v0 = vdelta(v0,[[V10]])
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define <64 x i16> @test_10(<64 x i16> %a0) #1 {
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%v0 = call <64 x i16> @llvm.bswap.v64i16(<64 x i16> %a0)
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ret <64 x i16> %v0
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}
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; CHECK-LABEL: test_11
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; CHECK: [[R11:r[0-9]+]] = ##50529027
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; CHECK: [[V11:v[0-9]+]] = vsplat([[R11]])
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; CHECK: v0 = vdelta(v0,[[V11]])
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define <32 x i32> @test_11(<32 x i32> %a0) #1 {
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%v0 = call <32 x i32> @llvm.bswap.v32i32(<32 x i32> %a0)
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ret <32 x i32> %v0
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}
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declare <32 x i16> @llvm.bswap.v32i16(<32 x i16>) #0
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declare <16 x i32> @llvm.bswap.v16i32(<16 x i32>) #0
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declare <64 x i16> @llvm.bswap.v64i16(<64 x i16>) #1
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declare <32 x i32> @llvm.bswap.v32i32(<32 x i32>) #1
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attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
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attributes #1 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" }
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