Evan Cheng 9add880566 Initial support for register pressure aware scheduling. The register reduction ... scheduler can go into a "vertical mode" (i.e. traversing up the two-address chain, etc.) when the register pressure is low. This does seem to reduce the number of spills in the cases I've looked at. But with x86, it's no guarantee the performance of the code improves. It can be turned on with -sched-vertically option. llvm-svn: 28108		2006-05-04 19:16:39 +00:00
llvm	Initial support for register pressure aware scheduling. The register reduction	2006-05-04 19:16:39 +00:00