Luis Marques 20d2424016 [RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS ... When not optimizing for minimum size (-Oz) we custom lower wide shifts (SHL_PARTS, SRA_PARTS, SRL_PARTS) instead of expanding to a libcall. Differential Revision: https://reviews.llvm.org/D59477 llvm-svn: 358498		2019-04-16 14:38:32 +00:00
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AsmParser	[RISCV] Diagnose invalid second input register operand when using %tprel_add	2019-04-11 15:13:12 +00:00
Disassembler	[RISCV] Add basic RV32E definitions and MC layer support	2019-03-22 11:21:40 +00:00
InstPrinter	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
MCTargetDesc	[RISCV] Support assembling TLS add and associated modifiers	2019-04-04 14:13:37 +00:00
TargetInfo	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
Utils	[RISCV] Attach VK_RISCV_CALL to symbols upon creation	2019-04-01 14:53:17 +00:00
CMakeLists.txt	[RISCV] Support named operands for CSR instructions.	2018-10-04 21:50:54 +00:00
LLVMBuild.txt	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCV.h	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCV.td	[RISCV] Add basic RV32E definitions and MC layer support	2019-03-22 11:21:40 +00:00
RISCVAsmPrinter.cpp	[AsmPrinter] refactor to remove remove AsmVariant. NFC	2019-04-10 16:38:43 +00:00
RISCVCallingConv.td	[RISCV] Add codegen support for ilp32f, ilp32d, lp64f, and lp64d ("hard float") ABIs	2019-03-30 17:59:30 +00:00
RISCVExpandPseudoInsts.cpp	[RISCV] Generate address sequences suitable for mcmodel=medium	2019-04-01 14:42:56 +00:00
RISCVFrameLowering.cpp	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVFrameLowering.h	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVISelDAGToDAG.cpp	[RISCV][NFC] Add break to case statement in RISCVDAGToDAGISel::Select	2019-01-22 07:22:00 +00:00
RISCVISelLowering.cpp	[RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS	2019-04-16 14:38:32 +00:00
RISCVISelLowering.h	[RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS	2019-04-16 14:38:32 +00:00
RISCVInstrFormats.td	[RISCV] Implement pseudo instructions for load/store from a symbol address.	2019-02-20 03:31:32 +00:00
RISCVInstrFormatsC.td	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVInstrInfo.cpp	[RISCV] Generate address sequences suitable for mcmodel=medium	2019-04-01 14:42:56 +00:00
RISCVInstrInfo.h	Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI	2019-01-25 20:22:49 +00:00
RISCVInstrInfo.td	[RISCV] Support assembling TLS add and associated modifiers	2019-04-04 14:13:37 +00:00
RISCVInstrInfoA.td	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVInstrInfoC.td	[RISCV] Add implied zero offset load/store alias patterns	2019-02-21 14:09:34 +00:00
RISCVInstrInfoD.td	[RISCV] Add seto pattern expansion	2019-04-01 09:54:14 +00:00
RISCVInstrInfoF.td	[RISCV] Add seto pattern expansion	2019-04-01 09:54:14 +00:00
RISCVInstrInfoM.td	[RISCV] Custom-legalise i32 SDIV/UDIV/UREM on RV64M	2019-01-25 05:11:34 +00:00
RISCVMCInstLower.cpp	[RISCV] Attach VK_RISCV_CALL to symbols upon creation	2019-04-01 14:53:17 +00:00
RISCVMachineFunctionInfo.h	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVMergeBaseOffset.cpp	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVRegisterInfo.cpp	[RISCV] Add codegen support for ilp32f, ilp32d, lp64f, and lp64d ("hard float") ABIs	2019-03-30 17:59:30 +00:00
RISCVRegisterInfo.h	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVRegisterInfo.td	[RISCV] Allow fp as an alias of s0	2019-03-11 21:35:26 +00:00
RISCVSubtarget.cpp	[RISCV] Add basic RV32E definitions and MC layer support	2019-03-22 11:21:40 +00:00
RISCVSubtarget.h	[RISCV] Add basic RV32E definitions and MC layer support	2019-03-22 11:21:40 +00:00
RISCVSystemOperands.td	[RISCV] Allow access to FP CSRs without F extension	2019-03-08 23:01:08 +00:00
RISCVTargetMachine.cpp	[RISCV] Support -target-abi at the MC layer and for codegen	2019-03-09 09:28:06 +00:00
RISCVTargetMachine.h	Update the file headers across all of the LLVM projects in the monorepo	2019-01-19 08:50:56 +00:00
RISCVTargetObjectFile.cpp	[RISCV] Put data smaller than eight bytes to small data section	2019-04-11 04:59:13 +00:00
RISCVTargetObjectFile.h	[RISCV] Put data smaller than eight bytes to small data section	2019-04-11 04:59:13 +00:00