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llvm-project/llvm/test/MC
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Bill Wendling b2f6630739 [PowerPC] Allow a '%' prefix for registers in CFI directives 
Clang generates a '%' prefix for some registers in CFI directives. E.g.
".cfi_register lr, r12" becomes ".cfi_register lr, %r12" after
processing.

Differential Revision: https://reviews.llvm.org/D91735
 		2020-11-19 18:19:51 -08:00
..
AArch64 [AArch64] Enable RAS 1.1 system registers in all AArch64 2020-11-10 12:13:33 +00:00
AMDGPU [AMDGPU][MC] Corrected error position for some operands and modifiers 2020-11-16 16:11:23 +03:00
ARM MCExpr::evaluateAsRelocatableImpl : allow evaluation of non-VK_None MCSymbolRefExpr when MCAsmLayout is available 2020-11-18 13:52:33 -08:00
AVR [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex 2020-07-12 08:14:52 -07:00
AsmParser Introduce and use a new section type for the bb_addr_map section. 2020-10-08 11:13:19 -07:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
COFF [test][MC] Use %python in llvm/test/MC/COFF/bigobj.py 2020-10-07 14:03:28 -04:00
Disassembler [mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions 2020-11-13 14:31:12 +03:00
ELF MCExpr::evaluateAsRelocatableImpl : allow evaluation of non-VK_None MCSymbolRefExpr when MCAsmLayout is available 2020-11-18 13:52:33 -08:00
Hexagon [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Lanai
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MSP430 [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
MachO llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits 2020-10-04 15:48:57 -07:00
Mips [MC][mips] Remove unused check prefixes. NFC 2020-11-13 14:31:13 +03:00
PowerPC [PowerPC] Allow a '%' prefix for registers in CFI directives 2020-11-19 18:19:51 -08:00
RISCV [RISCV] Use register class VR for V instruction operands directly. 2020-11-19 05:59:46 +08:00
Sparc [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn(). 2020-10-06 14:42:40 +02:00
VE [VE] Add missing BCR format 2020-10-29 23:30:49 +09:00
WebAssembly Reland "[lib/Support/YAMLTraits] - Don't print leading zeroes when dumping Hex8/Hex16/Hex32 types." (https://reviews.llvm.org/D90930). 2020-11-18 13:08:46 +03:00
X86 [AsmParser] Add source location to all errors related to .cfi directives 2020-11-11 17:00:07 +00:00