forked from OSchip/llvm-project
53 lines
1.8 KiB
LLVM
53 lines
1.8 KiB
LLVM
; Check the miscellaneous logical vector operations added in P8
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;
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; Test x eqv y
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define <4 x i32> @test_xxleqv(<4 x i32> %x, <4 x i32> %y) nounwind {
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%tmp = xor <4 x i32> %x, %y
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%ret_val = xor <4 x i32> %tmp, < i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i32> %ret_val
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; CHECK: xxleqv 34, 34, 35
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}
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; Test x xxlnand y
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define <4 x i32> @test_xxlnand(<4 x i32> %x, <4 x i32> %y) nounwind {
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%tmp = and <4 x i32> %x, %y
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%ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i32> %ret_val
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; CHECK: xxlnand 34, 34, 35
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}
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; Test x xxlorc y
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define <4 x i32> @test_xxlorc(<4 x i32> %x, <4 x i32> %y) nounwind {
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%tmp = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
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%ret_val = or <4 x i32> %x, %tmp
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ret <4 x i32> %ret_val
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; CHECK: xxlorc 34, 34, 35
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}
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; Test x eqv y
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define <8 x i16> @test_xxleqvv8i16(<8 x i16> %x, <8 x i16> %y) nounwind {
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%tmp = xor <8 x i16> %x, %y
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%ret_val = xor <8 x i16> %tmp, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
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ret <8 x i16> %ret_val
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; CHECK: xxleqv 34, 34, 35
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}
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; Test x xxlnand y
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define <8 x i16> @test_xxlnandv8i16(<8 x i16> %x, <8 x i16> %y) nounwind {
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%tmp = and <8 x i16> %x, %y
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%ret_val = xor <8 x i16> %tmp, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
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ret <8 x i16> %ret_val
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; CHECK: xxlnand 34, 34, 35
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}
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; Test x xxlorc y
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define <8 x i16> @test_xxlorcv8i16(<8 x i16> %x, <8 x i16> %y) nounwind {
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%tmp = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
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%ret_val = or <8 x i16> %x, %tmp
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ret <8 x i16> %ret_val
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; CHECK: xxlorc 34, 34, 35
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}
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