forked from OSchip/llvm-project
93 lines
3.7 KiB
C++
93 lines
3.7 KiB
C++
//===-- RISCVFixupKinds.h - RISCV Specific Fixup Entries --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
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#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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#undef RISCV
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namespace llvm {
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namespace RISCV {
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enum Fixups {
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// fixup_riscv_hi20 - 20-bit fixup corresponding to hi(foo) for
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// instructions like lui
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fixup_riscv_hi20 = FirstTargetFixupKind,
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// fixup_riscv_lo12_i - 12-bit fixup corresponding to lo(foo) for
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// instructions like addi
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fixup_riscv_lo12_i,
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// fixup_riscv_lo12_s - 12-bit fixup corresponding to lo(foo) for
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// the S-type store instructions
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fixup_riscv_lo12_s,
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// fixup_riscv_pcrel_hi20 - 20-bit fixup corresponding to pcrel_hi(foo) for
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// instructions like auipc
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fixup_riscv_pcrel_hi20,
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// fixup_riscv_pcrel_lo12_i - 12-bit fixup corresponding to pcrel_lo(foo) for
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// instructions like addi
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fixup_riscv_pcrel_lo12_i,
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// fixup_riscv_pcrel_lo12_s - 12-bit fixup corresponding to pcrel_lo(foo) for
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// the S-type store instructions
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fixup_riscv_pcrel_lo12_s,
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// fixup_riscv_got_hi20 - 20-bit fixup corresponding to got_pcrel_hi(foo) for
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// instructions like auipc
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fixup_riscv_got_hi20,
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// fixup_riscv_tprel_hi20 - 20-bit fixup corresponding to tprel_hi(foo) for
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// instructions like lui
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fixup_riscv_tprel_hi20,
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// fixup_riscv_tprel_lo12_i - 12-bit fixup corresponding to tprel_lo(foo) for
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// instructions like addi
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fixup_riscv_tprel_lo12_i,
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// fixup_riscv_tprel_lo12_s - 12-bit fixup corresponding to tprel_lo(foo) for
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// the S-type store instructions
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fixup_riscv_tprel_lo12_s,
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// fixup_riscv_tprel_add - A fixup corresponding to %tprel_add(foo) for the
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// add_tls instruction. Used to provide a hint to the linker.
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fixup_riscv_tprel_add,
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// fixup_riscv_tls_got_hi20 - 20-bit fixup corresponding to
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// tls_ie_pcrel_hi(foo) for instructions like auipc
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fixup_riscv_tls_got_hi20,
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// fixup_riscv_tls_gd_hi20 - 20-bit fixup corresponding to
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// tls_gd_pcrel_hi(foo) for instructions like auipc
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fixup_riscv_tls_gd_hi20,
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// fixup_riscv_jal - 20-bit fixup for symbol references in the jal
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// instruction
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fixup_riscv_jal,
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// fixup_riscv_branch - 12-bit fixup for symbol references in the branch
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// instructions
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fixup_riscv_branch,
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// fixup_riscv_rvc_jump - 11-bit fixup for symbol references in the
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// compressed jump instruction
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fixup_riscv_rvc_jump,
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// fixup_riscv_rvc_branch - 8-bit fixup for symbol references in the
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// compressed branch instruction
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fixup_riscv_rvc_branch,
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// fixup_riscv_call - A fixup representing a call attached to the auipc
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// instruction in a pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call,
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// fixup_riscv_call_plt - A fixup representing a procedure linkage table call
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// attached to the auipc instruction in a pair composed of adjacent auipc+jalr
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// instructions.
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fixup_riscv_call_plt,
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// fixup_riscv_relax - Used to generate an R_RISCV_RELAX relocation type,
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// which indicates the linker may relax the instruction pair.
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fixup_riscv_relax,
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// fixup_riscv_align - Used to generate an R_RISCV_ALIGN relocation type,
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// which indicates the linker should fixup the alignment after linker
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// relaxation.
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fixup_riscv_align,
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// fixup_riscv_invalid - used as a sentinel and a marker, must be last fixup
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fixup_riscv_invalid,
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NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
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};
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} // end namespace RISCV
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} // end namespace llvm
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#endif
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