forked from OSchip/llvm-project
67 lines
2.0 KiB
LLVM
67 lines
2.0 KiB
LLVM
;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -O3 -code-model=small \
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;; RUN: -filetype=obj %s -o - | \
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;; RUN: elf-dump --dump-section-data | FileCheck %s
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;; FIXME: this file need to be in .s form, change when asm parse is done.
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@number64 = global i64 10, align 8
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define i64 @access_int64(i64 %a) nounwind readonly {
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entry:
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%0 = load i64* @number64, align 8
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%cmp = icmp eq i64 %0, %a
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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declare double @sin(double) nounwind
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define double @test_branch24 (double %x) nounwind readonly {
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entry:
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%add = call double @sin(double %x) nounwind
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ret double %add
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}
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;; The relocations in .rela.text are the 'number64' load using a
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;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function
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;; address using a R_PPC64_REL24
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;; CHECK: '.rela.text'
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;; CHECK: Relocation 0
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;; CHECK-NEXT: 'r_offset',
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;; CHECK-NEXT: 'r_sym', 0x00000006
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;; CHECK-NEXT: 'r_type', 0x0000003f
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;; CHECK: Relocation 1
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;; CHECK-NEXT: 'r_offset',
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;; CHECK-NEXT: 'r_sym', 0x0000000a
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;; CHECK-NEXT: 'r_type', 0x0000000a
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;; The .opd entry for the 'access_int64' function creates 2 relocations:
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;; 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
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; address itself);
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;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
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;; module's TOC base).
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;; CHECK: '.rela.opd'
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;; CHECK: Relocation 0
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;; CHECK-NEXT: 'r_offset',
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;; CHECK-NEXT: 'r_sym', 0x00000002
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;; CHECK-NEXT: 'r_type', 0x00000026
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;; CHECK: Relocation 1
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;; CHECK-NEXT: 'r_offset',
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;; CHECK-NEXT: 'r_sym', 0x00000000
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;; CHECK-NEXT: 'r_type', 0x00000033
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;; Finally the TOC creates the relocation for the 'number64'.
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;; CHECK: '.rela.toc'
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;; CHECK: Relocation 0
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;; CHECK-NEXT: 'r_offset',
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;; CHECK-NEXT: 'r_sym', 0x00000008
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;; CHECK-NEXT: 'r_type', 0x00000026
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;; Check if the relocation references are for correct symbols.
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;; CHECK: Symbol 7
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;; CHECK-NEXT: 'access_int64'
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;; CHECK: Symbol 8
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;; CHECK-NEXT: 'number64'
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;; CHECK: Symbol 10
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;; CHECK-NEXT: 'sin'
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