llvm-project/llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir

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# RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o - %s | FileCheck %s
--- |
define void @test0() { ret void }
...
---
# In the test below we have two independent def+use pairs of subregister1 which
# can be moved to a new virtual register. The third def of sub1 however is used
# in combination with sub0 and needs to stay with the original vreg.
# CHECK-LABEL: name: test0
# CHECK: S_NOP 0, implicit-def undef %0:sub0
# CHECK: S_NOP 0, implicit-def undef %2:sub1
# CHECK: S_NOP 0, implicit %2:sub1
# CHECK: S_NOP 0, implicit-def undef %1:sub1
# CHECK: S_NOP 0, implicit %1:sub1
# CHECK: S_NOP 0, implicit-def %0:sub1
# CHECK: S_NOP 0, implicit %0
name: test0
isSSA: true
registers:
- { id: 0, class: sreg_128 }
body: |
bb.0:
S_NOP 0, implicit-def undef %0:sub0
S_NOP 0, implicit-def %0:sub1
S_NOP 0, implicit %0:sub1
S_NOP 0, implicit-def %0:sub1
S_NOP 0, implicit %0:sub1
S_NOP 0, implicit-def %0:sub1
S_NOP 0, implicit %0
...