llvm-project/llvm/test/CodeGen/AArch64/GlobalISel
Tim Northover 62ae568bbb GlobalISel: implement low-level type with just size & vector lanes.
This should be all the low-level instruction selection needs to determine how
to implement an operation, with the remaining context taken from the opcode
(e.g. G_ADD vs G_FADD) or other flags not based on type (e.g. fast-math).

llvm-svn: 276158
2016-07-20 19:09:30 +00:00
..
arm64-irtranslator.ll GlobalISel: implement low-level type with just size & vector lanes. 2016-07-20 19:09:30 +00:00
arm64-regbankselect.mir GlobalISel: implement low-level type with just size & vector lanes. 2016-07-20 19:09:30 +00:00