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AlexEichenberger 01641197ee [MLIR] Remove TableGen redundant calls to native calls when creating new operations in DRR TableGen files 
Summary:
Currently, the TableGen rewrite generates redundant native calls in MLIR DRR files. This is a problem as some native calls may involve significant computations (e.g. when performing constant propagation where every values in a large tensor is touched).

The pattern was as follow:

```c++
if (native-call(args)) tblgen_attrs.emplace_back(rewriter, attribute, native-call(args))
```

The replacement pattern compute `native-call(args)` once and then use it both in the `if` condition and the `emplace_back` call.

Differential Revision: https://reviews.llvm.org/D82101
 		2020-06-22 08:12:04 -07:00
..
Analysis Change filecheck default to dump input on failure 2020-06-09 18:57:46 +00:00
Conversion [mlir][spirv] Enhance AccessChainOp index type handling 2020-06-22 10:11:33 -04:00
Dialect [mlir][spirv] Enhance AccessChainOp index type handling 2020-06-22 10:11:33 -04:00
EDSC [mlir] Provide OpBuilder-based replacements for edsc::BlockBuilder 2020-06-18 11:47:32 +02:00
Examples [lit] Improve naming of test result categories 2020-06-05 08:14:42 -07:00
IR [MLIR] Modify HasParent trait to allow one of several op's as a parent 2020-06-16 04:50:56 +00:00
Pass [mlir] Add a new context flag for disabling/enabling multi-threading 2020-05-02 12:32:25 -07:00
SDBM [MLIR] Reapply: Adjust libMLIR building to more closely follow libClang 2020-05-04 20:47:57 -07:00
Target [mlir] Add support for alignment annotations to the LLVM dialect to LLVM translation. 2020-06-19 16:36:06 +02:00
Transforms [mlir][DialectConversion] Refactor how block argument types get converted 2020-06-18 15:59:22 -07:00
Unit Add build files and update README. 2019-03-30 11:23:22 -07:00
lib [MLIR] Remove TableGen redundant calls to native calls when creating new operations in DRR TableGen files 2020-06-22 08:12:04 -07:00
mlir-cpu-runner Fix `check-mlir` target when the host target isn't configured 2020-06-19 06:36:20 +00:00
mlir-cuda-runner [MLIR][Standard] Make the `dim` operation index an operand. 2020-06-10 13:54:47 +00:00
mlir-linalg-ods-gen [mlir][Linalg] Add support to lower named ops to loops. 2020-04-30 13:45:17 -04:00
mlir-opt [mlir] Change dialect namespace loop->scf 2020-05-13 19:20:21 +02:00
mlir-rocm-runner [mlir][rocdl] Fixing breakage of dim operator from 904f91db 2020-06-11 17:35:22 +00:00
mlir-tblgen [MLIR] Remove TableGen redundant calls to native calls when creating new operations in DRR TableGen files 2020-06-22 08:12:04 -07:00
mlir-vulkan-runner [mlir][vulkan-runner] add support for memref of i8, i16 types in vulkan runner 2020-06-18 13:24:51 -07:00
APITest.h Mass update the MLIR license header to mention "Part of the LLVM project" 2020-01-26 03:58:30 +00:00
CMakeLists.txt [mlir][gpu] Introduce mlir-rocm-runner. 2020-06-05 09:46:39 -05:00
lit.cfg.py Fix `check-mlir` target when the host target isn't configured 2020-06-19 06:36:20 +00:00
lit.site.cfg.py.in [mlir][gpu] Introduce mlir-rocm-runner. 2020-06-05 09:46:39 -05:00