forked from OSchip/llvm-project
52 lines
1.7 KiB
LLVM
52 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -indvars -replexitval=always -S | FileCheck %s
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; Make sure IndVars preserves LCSSA form, especially across loop nests.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define void @PR18642(i32 %x) {
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; CHECK-LABEL: @PR18642(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
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; CHECK: outer.header:
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; CHECK-NEXT: br label [[INNER_HEADER:%.*]]
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; CHECK: inner.header:
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; CHECK-NEXT: br i1 false, label [[INNER_LATCH:%.*]], label [[OUTER_LATCH:%.*]]
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; CHECK: inner.latch:
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; CHECK-NEXT: br i1 true, label [[INNER_HEADER]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: outer.latch:
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; CHECK-NEXT: br i1 false, label [[OUTER_HEADER]], label [[EXIT_LOOPEXIT1:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit.loopexit1:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %outer.header
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outer.header:
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%outer.iv = phi i32 [ 0, %entry ], [ %x, %outer.latch ]
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br label %inner.header
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inner.header:
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%inner.iv = phi i32 [ undef, %outer.header ], [ %inc, %inner.latch ]
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%cmp1 = icmp slt i32 %inner.iv, %outer.iv
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br i1 %cmp1, label %inner.latch, label %outer.latch
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inner.latch:
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%inc = add nsw i32 %inner.iv, 1
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%cmp2 = icmp slt i32 %inner.iv, %outer.iv
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br i1 %cmp2, label %inner.header, label %exit
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outer.latch:
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br i1 undef, label %outer.header, label %exit
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exit:
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%exit.phi = phi i32 [ %inc, %inner.latch ], [ undef, %outer.latch ]
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ret void
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}
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