llvm-project/llvm/test/CodeGen
Simon Pilgrim aabd99c27a [X86] PUSH/POP 'mem-mem' instructions are not RMW - these are 2 different addresses
This patch adds a 'WriteCopy' [WriteLoad, WriteStore] schedule sequence instead to better model the behaviour

Found by @andreadb during llvm-mca testing on btver2 which was crashing on "zero uop" WriteRMW only instructions

llvm-svn: 343708
2018-10-03 19:02:38 +00:00
..
AArch64 [globalisel][combines] Don't sink G_TRUNC down to use if that use is a G_PHI 2018-10-03 15:43:39 +00:00
AMDGPU [AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics 2018-10-03 10:29:43 +00:00
ARC
ARM [ARM] Fix correctness checks in promoteToConstantPool. 2018-09-28 20:27:31 +00:00
AVR [AVR] Redefine the 'LSL' instruction as an alias of 'ADD' 2018-09-01 12:23:00 +00:00
BPF [bpf] Test case for symbol information in object file 2018-09-22 17:31:01 +00:00
Generic Re-submitting changes in D51550 because it failed to patch. 2018-09-24 20:47:12 +00:00
Hexagon [Hexagon] Fix extracting subvectors of non-HVX vNi1 2018-10-02 15:05:43 +00:00
Inputs
Lanai
MIR [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL 2018-10-01 21:59:45 +00:00
MSP430 [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks) 2018-08-29 11:18:14 +00:00
Mips [mips] Generate tests expectations using update_llc_test_checks. NFC 2018-10-01 14:43:07 +00:00
NVPTX [NVPTX] Implement isLegalToVectorizeLoadChain 2018-08-27 17:29:43 +00:00
Nios2
PowerPC [PowerPC] Folding XForm to DForm loads requires alignment for some DForm loads. 2018-10-01 20:16:27 +00:00
RISCV [RISCV] Remove RV64 test lines from umulo-128-legalisation-lowering.ll 2018-10-03 10:59:42 +00:00
SPARC [Sparc] Remove the support for builtin setjmp/longjmp 2018-09-27 13:32:54 +00:00
SystemZ [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks) 2018-08-29 11:18:14 +00:00
Thumb Revert "Revert "[ConstHoist] Do not rebase single (or few) dependent constant"" 2018-09-26 00:59:09 +00:00
Thumb2 [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33 2018-09-24 12:02:50 +00:00
WebAssembly [WebAssembly] any_true and all_true intrinsics and instructions 2018-10-03 00:19:39 +00:00
WinCFGuard [COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables 2018-09-19 09:58:30 +00:00
WinEH
X86 [X86] PUSH/POP 'mem-mem' instructions are not RMW - these are 2 different addresses 2018-10-03 19:02:38 +00:00
XCore