llvm-project/llvm/lib/Target/AArch64/AsmParser
Jim Grosbach 57fd2623c3 AArch64: allow constant expressions for shifted reg literals
e.g., add w1, w2, w3, lsl #(2 - 1)

This sort of thing comes up in pre-processed assembly playing macro games.
Still validate that it's an assembly time constant. The early exit error check
was just a bit overzealous and disallowed a left paren.

rdar://18430542

llvm-svn: 218336
2014-09-23 22:16:02 +00:00
..
AArch64AsmParser.cpp AArch64: allow constant expressions for shifted reg literals 2014-09-23 22:16:02 +00:00
CMakeLists.txt AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
LLVMBuild.txt AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
Makefile AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00