forked from OSchip/llvm-project
627 lines
20 KiB
C
627 lines
20 KiB
C
/*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __ARM_ACLE_H
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#define __ARM_ACLE_H
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#ifndef __ARM_ACLE
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#error "ACLE intrinsics support not enabled."
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#endif
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#include <stdint.h>
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
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/* 8.3 Memory barriers */
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#if !defined(_MSC_VER)
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#define __dmb(i) __builtin_arm_dmb(i)
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#define __dsb(i) __builtin_arm_dsb(i)
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#define __isb(i) __builtin_arm_isb(i)
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#endif
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/* 8.4 Hints */
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#if !defined(_MSC_VER)
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfi(void) {
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__builtin_arm_wfi();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfe(void) {
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__builtin_arm_wfe();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sev(void) {
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__builtin_arm_sev();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sevl(void) {
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__builtin_arm_sevl();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __yield(void) {
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__builtin_arm_yield();
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}
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#endif
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#if __ARM_32BIT_STATE
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#define __dbg(t) __builtin_arm_dbg(t)
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#endif
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/* 8.5 Swap */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__swp(uint32_t __x, volatile uint32_t *__p) {
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uint32_t v;
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do
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v = __builtin_arm_ldrex(__p);
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while (__builtin_arm_strex(__x, __p));
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return v;
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}
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/* 8.6 Memory prefetch intrinsics */
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/* 8.6.1 Data prefetch */
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#define __pld(addr) __pldx(0, 0, 0, addr)
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#if __ARM_32BIT_STATE
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#define __pldx(access_kind, cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, access_kind, 1)
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#else
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#define __pldx(access_kind, cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
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#endif
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/* 8.6.2 Instruction prefetch */
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#define __pli(addr) __plix(0, 0, addr)
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#if __ARM_32BIT_STATE
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#define __plix(cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, 0, 0)
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#else
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#define __plix(cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
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#endif
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/* 8.7 NOP */
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __nop(void) {
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__builtin_arm_nop();
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}
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/* 9 DATA-PROCESSING INTRINSICS */
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/* 9.2 Miscellaneous data-processing intrinsics */
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/* ROR */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__ror(uint32_t __x, uint32_t __y) {
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__y %= 32;
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if (__y == 0)
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return __x;
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return (__x >> __y) | (__x << (32 - __y));
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rorll(uint64_t __x, uint32_t __y) {
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__y %= 64;
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if (__y == 0)
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return __x;
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return (__x >> __y) | (__x << (64 - __y));
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__rorl(unsigned long __x, uint32_t __y) {
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#if __SIZEOF_LONG__ == 4
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return __ror(__x, __y);
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#else
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return __rorll(__x, __y);
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#endif
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}
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/* CLZ */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__clz(uint32_t __t) {
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return __builtin_clz(__t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__clzl(unsigned long __t) {
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return __builtin_clzl(__t);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__clzll(uint64_t __t) {
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return __builtin_clzll(__t);
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}
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/* REV */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__rev(uint32_t __t) {
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return __builtin_bswap32(__t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__revl(unsigned long __t) {
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#if __SIZEOF_LONG__ == 4
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return __builtin_bswap32(__t);
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#else
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return __builtin_bswap64(__t);
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#endif
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__revll(uint64_t __t) {
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return __builtin_bswap64(__t);
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}
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/* REV16 */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__rev16(uint32_t __t) {
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return __ror(__rev(__t), 16);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rev16ll(uint64_t __t) {
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return (((uint64_t)__rev16(__t >> 32)) << 32) | __rev16(__t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__rev16l(unsigned long __t) {
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#if __SIZEOF_LONG__ == 4
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return __rev16(__t);
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#else
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return __rev16ll(__t);
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#endif
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}
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/* REVSH */
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static __inline__ int16_t __attribute__((__always_inline__, __nodebug__))
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__revsh(int16_t __t) {
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return __builtin_bswap16(__t);
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}
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/* RBIT */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__rbit(uint32_t __t) {
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return __builtin_arm_rbit(__t);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rbitll(uint64_t __t) {
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#if __ARM_32BIT_STATE
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return (((uint64_t)__builtin_arm_rbit(__t)) << 32) |
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__builtin_arm_rbit(__t >> 32);
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#else
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return __builtin_arm_rbit64(__t);
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#endif
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__rbitl(unsigned long __t) {
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#if __SIZEOF_LONG__ == 4
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return __rbit(__t);
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#else
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return __rbitll(__t);
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#endif
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}
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/*
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* 9.3 16-bit multiplications
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*/
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#if __ARM_FEATURE_DSP
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smulbb(int32_t __a, int32_t __b) {
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return __builtin_arm_smulbb(__a, __b);
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}
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smulbt(int32_t __a, int32_t __b) {
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return __builtin_arm_smulbt(__a, __b);
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}
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smultb(int32_t __a, int32_t __b) {
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return __builtin_arm_smultb(__a, __b);
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}
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smultt(int32_t __a, int32_t __b) {
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return __builtin_arm_smultt(__a, __b);
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}
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smulwb(int32_t __a, int32_t __b) {
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return __builtin_arm_smulwb(__a, __b);
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}
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smulwt(int32_t __a, int32_t __b) {
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return __builtin_arm_smulwt(__a, __b);
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}
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#endif
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/*
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* 9.4 Saturating intrinsics
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*
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* FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
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* intrinsics are implemented and the flag is enabled.
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*/
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/* 9.4.1 Width-specified saturation intrinsics */
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#if __ARM_FEATURE_SAT
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#define __ssat(x, y) __builtin_arm_ssat(x, y)
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#define __usat(x, y) __builtin_arm_usat(x, y)
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#endif
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/* 9.4.2 Saturating addition and subtraction intrinsics */
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#if __ARM_FEATURE_DSP
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qadd(int32_t __t, int32_t __v) {
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return __builtin_arm_qadd(__t, __v);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qsub(int32_t __t, int32_t __v) {
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return __builtin_arm_qsub(__t, __v);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qdbl(int32_t __t) {
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return __builtin_arm_qadd(__t, __t);
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}
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#endif
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/* 9.4.3 Accumultating multiplications */
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#if __ARM_FEATURE_DSP
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlabb(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlabb(__a, __b, __c);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlabt(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlabt(__a, __b, __c);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlatb(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlatb(__a, __b, __c);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlatt(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlatt(__a, __b, __c);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlawb(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlawb(__a, __b, __c);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlawt(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlawt(__a, __b, __c);
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}
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#endif
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/* 9.5.4 Parallel 16-bit saturation */
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#if __ARM_FEATURE_SIMD32
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#define __ssat16(x, y) __builtin_arm_ssat16(x, y)
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#define __usat16(x, y) __builtin_arm_usat16(x, y)
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#endif
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/* 9.5.5 Packing and unpacking */
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#if __ARM_FEATURE_SIMD32
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typedef int32_t int8x4_t;
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typedef int32_t int16x2_t;
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typedef uint32_t uint8x4_t;
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typedef uint32_t uint16x2_t;
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__sxtab16(int16x2_t __a, int8x4_t __b) {
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return __builtin_arm_sxtab16(__a, __b);
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}
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__sxtb16(int8x4_t __a) {
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return __builtin_arm_sxtb16(__a);
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}
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__uxtab16(int16x2_t __a, int8x4_t __b) {
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return __builtin_arm_uxtab16(__a, __b);
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}
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__uxtb16(int8x4_t __a) {
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return __builtin_arm_uxtb16(__a);
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}
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#endif
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/* 9.5.6 Parallel selection */
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#if __ARM_FEATURE_SIMD32
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__sel(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_sel(__a, __b);
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}
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#endif
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/* 9.5.7 Parallel 8-bit addition and subtraction */
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#if __ARM_FEATURE_SIMD32
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__qadd8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_qadd8(__a, __b);
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}
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__qsub8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_qsub8(__a, __b);
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}
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__sadd8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_sadd8(__a, __b);
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}
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__shadd8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_shadd8(__a, __b);
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}
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__shsub8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_shsub8(__a, __b);
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}
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__ssub8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_ssub8(__a, __b);
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}
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__uadd8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_uadd8(__a, __b);
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}
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__uhadd8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_uhadd8(__a, __b);
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}
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__uhsub8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_uhsub8(__a, __b);
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}
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__uqadd8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_uqadd8(__a, __b);
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}
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__uqsub8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_uqsub8(__a, __b);
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}
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__usub8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_usub8(__a, __b);
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}
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#endif
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/* 9.5.8 Sum of 8-bit absolute differences */
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#if __ARM_FEATURE_SIMD32
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__usad8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_usad8(__a, __b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__usada8(uint8x4_t __a, uint8x4_t __b, uint32_t __c) {
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return __builtin_arm_usada8(__a, __b, __c);
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}
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#endif
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/* 9.5.9 Parallel 16-bit addition and subtraction */
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#if __ARM_FEATURE_SIMD32
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__qadd16(int16x2_t __a, int16x2_t __b) {
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return __builtin_arm_qadd16(__a, __b);
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}
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__qasx(int16x2_t __a, int16x2_t __b) {
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return __builtin_arm_qasx(__a, __b);
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}
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__qsax(int16x2_t __a, int16x2_t __b) {
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return __builtin_arm_qsax(__a, __b);
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}
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__qsub16(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_qsub16(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__sadd16(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_sadd16(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__sasx(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_sasx(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__shadd16(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_shadd16(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__shasx(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_shasx(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__shsax(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_shsax(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__shsub16(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_shsub16(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__ssax(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_ssax(__a, __b);
|
|
}
|
|
static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__ssub16(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_ssub16(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uadd16(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uadd16(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uasx(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uasx(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uhadd16(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uhadd16(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uhasx(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uhasx(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uhsax(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uhsax(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uhsub16(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uhsub16(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uqadd16(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uqadd16(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uqasx(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uqasx(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uqsax(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uqsax(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__uqsub16(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_uqsub16(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__usax(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_usax(__a, __b);
|
|
}
|
|
static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
|
|
__usub16(uint16x2_t __a, uint16x2_t __b) {
|
|
return __builtin_arm_usub16(__a, __b);
|
|
}
|
|
#endif
|
|
|
|
/* 9.5.10 Parallel 16-bit multiplications */
|
|
#if __ARM_FEATURE_SIMD32
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlad(int16x2_t __a, int16x2_t __b, int32_t __c) {
|
|
return __builtin_arm_smlad(__a, __b, __c);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smladx(int16x2_t __a, int16x2_t __b, int32_t __c) {
|
|
return __builtin_arm_smladx(__a, __b, __c);
|
|
}
|
|
static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlald(int16x2_t __a, int16x2_t __b, int64_t __c) {
|
|
return __builtin_arm_smlald(__a, __b, __c);
|
|
}
|
|
static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlaldx(int16x2_t __a, int16x2_t __b, int64_t __c) {
|
|
return __builtin_arm_smlaldx(__a, __b, __c);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlsd(int16x2_t __a, int16x2_t __b, int32_t __c) {
|
|
return __builtin_arm_smlsd(__a, __b, __c);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlsdx(int16x2_t __a, int16x2_t __b, int32_t __c) {
|
|
return __builtin_arm_smlsdx(__a, __b, __c);
|
|
}
|
|
static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlsld(int16x2_t __a, int16x2_t __b, int64_t __c) {
|
|
return __builtin_arm_smlsld(__a, __b, __c);
|
|
}
|
|
static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
|
|
__smlsldx(int16x2_t __a, int16x2_t __b, int64_t __c) {
|
|
return __builtin_arm_smlsldx(__a, __b, __c);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smuad(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_smuad(__a, __b);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smuadx(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_smuadx(__a, __b);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smusd(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_smusd(__a, __b);
|
|
}
|
|
static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
|
|
__smusdx(int16x2_t __a, int16x2_t __b) {
|
|
return __builtin_arm_smusdx(__a, __b);
|
|
}
|
|
#endif
|
|
|
|
/* 9.7 CRC32 intrinsics */
|
|
#if __ARM_FEATURE_CRC32
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32b(uint32_t __a, uint8_t __b) {
|
|
return __builtin_arm_crc32b(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32h(uint32_t __a, uint16_t __b) {
|
|
return __builtin_arm_crc32h(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32w(uint32_t __a, uint32_t __b) {
|
|
return __builtin_arm_crc32w(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32d(uint32_t __a, uint64_t __b) {
|
|
return __builtin_arm_crc32d(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32cb(uint32_t __a, uint8_t __b) {
|
|
return __builtin_arm_crc32cb(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32ch(uint32_t __a, uint16_t __b) {
|
|
return __builtin_arm_crc32ch(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32cw(uint32_t __a, uint32_t __b) {
|
|
return __builtin_arm_crc32cw(__a, __b);
|
|
}
|
|
|
|
static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
|
|
__crc32cd(uint32_t __a, uint64_t __b) {
|
|
return __builtin_arm_crc32cd(__a, __b);
|
|
}
|
|
#endif
|
|
|
|
/* 10.1 Special register intrinsics */
|
|
#define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg)
|
|
#define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg)
|
|
#define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg)
|
|
#define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v)
|
|
#define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v)
|
|
#define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v)
|
|
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
#endif /* __ARM_ACLE_H */
|