forked from OSchip/llvm-project
295 lines
13 KiB
LLVM
295 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -simplifycfg-max-small-block-size=6 -S < %s | FileCheck %s
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; RUN: opt -passes=simplifycfg -simplifycfg-max-small-block-size=6 -S < %s | FileCheck %s
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target datalayout = "e-p:64:64-p5:32:32-A5"
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declare void @llvm.assume(i1)
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declare i1 @llvm.type.test(i8*, metadata) nounwind readnone
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define void @test_01(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_01(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
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; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR]] to i64
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; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
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; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: true2.critedge:
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; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint i64* [[PTR]] to i64
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; CHECK-NEXT: [[MASKEDPTR_C:%.*]] = and i64 [[PTRINT_C]], 7
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; CHECK-NEXT: [[MASKCOND_C:%.*]] = icmp eq i64 [[MASKEDPTR_C]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND_C]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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br i1 %c, label %true1, label %false1
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true1: ; preds = %false1, %0
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%ptrint = ptrtoint i64* %ptr to i64
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%maskedptr = and i64 %ptrint, 7
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%maskcond = icmp eq i64 %maskedptr, 0
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tail call void @llvm.assume(i1 %maskcond)
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store volatile i64 0, i64* %ptr, align 8
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br i1 %c, label %true2, label %false2
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false1: ; preds = %0
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store volatile i64 1, i64* %ptr, align 4
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br label %true1
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true2: ; preds = %true1
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store volatile i64 2, i64* %ptr, align 8
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ret void
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false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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; Corner case: the block has max possible size for which we still do PRE.
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define void @test_02(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_02(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
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; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR]] to i64
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; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
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; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: true2.critedge:
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; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint i64* [[PTR]] to i64
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; CHECK-NEXT: [[MASKEDPTR_C:%.*]] = and i64 [[PTRINT_C]], 7
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; CHECK-NEXT: [[MASKCOND_C:%.*]] = icmp eq i64 [[MASKEDPTR_C]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND_C]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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br i1 %c, label %true1, label %false1
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true1: ; preds = %false1, %0
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%ptrint = ptrtoint i64* %ptr to i64
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%maskedptr = and i64 %ptrint, 7
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%maskcond = icmp eq i64 %maskedptr, 0
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tail call void @llvm.assume(i1 %maskcond)
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store volatile i64 0, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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br i1 %c, label %true2, label %false2
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false1: ; preds = %0
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store volatile i64 1, i64* %ptr, align 4
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br label %true1
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true2: ; preds = %true1
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store volatile i64 2, i64* %ptr, align 8
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ret void
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false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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; This block is too huge for PRE.
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define void @test_03(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_03(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE1:%.*]], label [[FALSE1:%.*]]
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; CHECK: true1:
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; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR:%.*]] to i64
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; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
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; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: br i1 [[C]], label [[TRUE2:%.*]], label [[FALSE2:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR]], align 4
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; CHECK-NEXT: br label [[TRUE1]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: true2:
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: false2:
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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br i1 %c, label %true1, label %false1
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true1: ; preds = %false1, %0
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%ptrint = ptrtoint i64* %ptr to i64
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%maskedptr = and i64 %ptrint, 7
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%maskcond = icmp eq i64 %maskedptr, 0
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tail call void @llvm.assume(i1 %maskcond)
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store volatile i64 0, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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br i1 %c, label %true2, label %false2
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false1: ; preds = %0
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store volatile i64 1, i64* %ptr, align 4
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br label %true1
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true2: ; preds = %true1
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store volatile i64 2, i64* %ptr, align 8
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ret void
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false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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; Try the max block size for PRE again but with the bitcast/type test/assume
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; sequence used for whole program devirt.
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define void @test_04(i1 %c, i64* align 1 %ptr, [3 x i8*]* %vtable) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_04(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
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; CHECK-NEXT: [[VTABLEI8:%.*]] = bitcast [3 x i8*]* [[VTABLE:%.*]] to i8*
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; CHECK-NEXT: [[P:%.*]] = call i1 @llvm.type.test(i8* [[VTABLEI8]], metadata !"foo")
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[P]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: true2.critedge:
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; CHECK-NEXT: [[VTABLEI8_C:%.*]] = bitcast [3 x i8*]* [[VTABLE]] to i8*
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; CHECK-NEXT: [[P_C:%.*]] = call i1 @llvm.type.test(i8* [[VTABLEI8_C]], metadata !"foo")
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[P_C]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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br i1 %c, label %true1, label %false1
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true1: ; preds = %false1, %0
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%vtablei8 = bitcast [3 x i8*]* %vtable to i8*
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%p = call i1 @llvm.type.test(i8* %vtablei8, metadata !"foo")
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tail call void @llvm.assume(i1 %p)
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store volatile i64 0, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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br i1 %c, label %true2, label %false2
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false1: ; preds = %0
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store volatile i64 1, i64* %ptr, align 4
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br label %true1
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true2: ; preds = %true1
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store volatile i64 2, i64* %ptr, align 8
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ret void
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false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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; The load, icmp and assume should not count towards the limit, they are
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; ephemeral.
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define void @test_non_speculatable(i1 %c, i64* align 1 %ptr, i8* %ptr2) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_non_speculatable(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
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; CHECK-NEXT: [[V:%.*]] = load i8, i8* [[PTR2:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[V]], 42
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; CHECK-NEXT: call void @llvm.assume(i1 [[C2]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: common.ret:
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; CHECK-NEXT: ret void
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; CHECK: true2.critedge:
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; CHECK-NEXT: [[V_C:%.*]] = load i8, i8* [[PTR2]], align 1
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; CHECK-NEXT: [[C2_C:%.*]] = icmp eq i8 [[V_C]], 42
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; CHECK-NEXT: call void @llvm.assume(i1 [[C2_C]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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br i1 %c, label %true1, label %false1
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true1: ; preds = %false1, %0
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%v = load i8, i8* %ptr2
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%c2 = icmp eq i8 %v, 42
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call void @llvm.assume(i1 %c2)
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store volatile i64 0, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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br i1 %c, label %true2, label %false2
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false1: ; preds = %0
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store volatile i64 1, i64* %ptr, align 4
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br label %true1
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true2: ; preds = %true1
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store volatile i64 2, i64* %ptr, align 8
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ret void
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false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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