forked from OSchip/llvm-project
154 lines
3.4 KiB
LLVM
154 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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; PR2967
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target datalayout =
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"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32"
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target triple = "i386-pc-linux-gnu"
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define void @test1(i32 %x) nounwind {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[TMP0]], true
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; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
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; CHECK-NEXT: ret void
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;
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entry:
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%0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb, label %return
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bb: ; preds = %entry
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%1 = load volatile i32, i32* null
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unreachable
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br label %return
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return: ; preds = %entry
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ret void
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}
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define void @test1_no_null_opt(i32 %x) nounwind #0 {
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; CHECK-LABEL: @test1_no_null_opt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[TMP0]], true
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; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
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; CHECK-NEXT: ret void
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;
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entry:
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%0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb, label %return
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bb: ; preds = %entry
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%1 = load volatile i32, i32* null
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unreachable
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br label %return
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return: ; preds = %entry
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ret void
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}
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; rdar://7958343
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define void @test2() nounwind {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: unreachable
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;
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entry:
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store i32 4,i32* null
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ret void
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}
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define void @test2_no_null_opt() nounwind #0 {
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; CHECK-LABEL: @test2_no_null_opt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: store i32 4, i32* null, align 4
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; CHECK-NEXT: ret void
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;
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entry:
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store i32 4,i32* null
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ret void
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}
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; PR7369
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define void @test3() nounwind {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: store volatile i32 4, i32* null, align 4
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; CHECK-NEXT: ret void
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;
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entry:
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store volatile i32 4, i32* null
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ret void
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}
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define void @test3_no_null_opt() nounwind #0 {
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; CHECK-LABEL: @test3_no_null_opt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: store volatile i32 4, i32* null, align 4
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; CHECK-NEXT: ret void
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;
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entry:
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store volatile i32 4, i32* null
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ret void
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}
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; Check store before unreachable.
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define void @test4(i1 %C, i32* %P) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[T:%.*]], label [[F:%.*]]
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; CHECK: T:
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; CHECK-NEXT: store volatile i32 0, i32* [[P:%.*]], align 4
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; CHECK-NEXT: unreachable
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; CHECK: F:
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 %C, label %T, label %F
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T:
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store volatile i32 0, i32* %P
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unreachable
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F:
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ret void
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}
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; Check cmpxchg before unreachable.
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define void @test5(i1 %C, i32* %P) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
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; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 %C, label %T, label %F
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T:
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cmpxchg volatile i32* %P, i32 0, i32 1 seq_cst seq_cst
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unreachable
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F:
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ret void
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}
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; Check atomicrmw before unreachable.
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define void @test6(i1 %C, i32* %P) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
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; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 %C, label %T, label %F
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T:
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atomicrmw volatile xchg i32* %P, i32 0 seq_cst
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unreachable
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F:
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ret void
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}
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attributes #0 = { null_pointer_is_valid }
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