forked from OSchip/llvm-project
66 lines
2.1 KiB
LLVM
66 lines
2.1 KiB
LLVM
; RUN: opt -gvn-hoist -S < %s | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@input = local_unnamed_addr global i32* null, align 8
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; Check that the load instruction is **not** hoisted
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; CHECK-LABEL: @_Z3fooPii
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; CHECK-LABEL: if.then:
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; CHECK-NEXT: load
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; CHECK-LABEL: if2:
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; CHECK: load
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; CHECK-LABEL: @main
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define i32 @_Z3fooPii(i32* %p, i32 %x) local_unnamed_addr {
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entry:
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%cmp.not = icmp eq i32* %p, null
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br i1 %cmp.not, label %if.end3, label %if.then
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if.then: ; preds = %entry
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%0 = load i32, i32* %p, align 4, !tbaa !3
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%add = add nsw i32 %0, %x
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%cmp1 = icmp eq i32 %add, 4
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br i1 %cmp1, label %if2, label %if.end3
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if.end3: ; preds = %entry, %if.then
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%x.addr.0 = phi i32 [ %add, %if.then ], [ %x, %entry ]
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%add4 = add nsw i32 %x.addr.0, 2
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br i1 %cmp.not, label %if.end11, label %if2
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if2: ; preds = %if.end3, %if.then
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%x.addr.1 = phi i32 [ 4, %if.then ], [ %x.addr.0, %if.end3 ]
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%y.0 = phi i32 [ 2, %if.then ], [ %add4, %if.end3 ]
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%1 = load i32, i32* %p, align 4, !tbaa !3
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%add7 = add nsw i32 %x.addr.1, %1
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%cmp8 = icmp eq i32 %add7, 5
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br i1 %cmp8, label %end, label %if.end11
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if.end11: ; preds = %if.end3, %if2
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%x.addr.2 = phi i32 [ %add7, %if2 ], [ %x.addr.0, %if.end3 ]
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%y.1 = phi i32 [ %y.0, %if2 ], [ %add4, %if.end3 ]
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%add12 = add nsw i32 %y.1, %x.addr.2
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br label %end
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end: ; preds = %if2, %if.end11
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%x.addr.3 = phi i32 [ 5, %if2 ], [ %x.addr.2, %if.end11 ]
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%y.2 = phi i32 [ %y.0, %if2 ], [ %add12, %if.end11 ]
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%add13 = add nsw i32 %x.addr.3, %y.2
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ret i32 %add13
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}
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define i32 @main() local_unnamed_addr {
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entry:
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%0 = load i32*, i32** @input, align 8, !tbaa !7
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%call = call i32 @_Z3fooPii(i32* %0, i32 0)
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ret i32 %call
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}
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!3 = !{!4, !4, i64 0}
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!4 = !{!"int", !5, i64 0}
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!5 = !{!"omnipotent char", !6, i64 0}
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!6 = !{!"Simple C++ TBAA"}
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!7 = !{!8, !8, i64 0}
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!8 = !{!"pointer@_ZTSPi", !5, i64 0}
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