forked from OSchip/llvm-project
32 lines
1.1 KiB
TableGen
32 lines
1.1 KiB
TableGen
//===-- enums.td - EnumsGen test definition file -----------*- tablegen -*-===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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include "mlir/IR/OpBase.td"
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def CaseA: EnumAttrCase<"CaseA", 0>;
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def CaseB: EnumAttrCase<"CaseB", 10>;
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def MyEnum: EnumAttr<"MyEnum", "A test enum", [CaseA, CaseB]> {
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let cppNamespace = "Outer::Inner";
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let stringToSymbolFnName = "ConvertToEnum";
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let symbolToStringFnName = "ConvertToString";
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}
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def Uint64Enum : EnumAttr<"Uint64Enum", "A test enum", [CaseA, CaseB]> {
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let underlyingType = "uint64_t";
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}
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